LM3S6965-IQN20A2T Просмотр технического описания (PDF) - Unspecified
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LM3S6965-IQN20A2T Datasheet PDF : 578 Pages
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LM3S6965 Microcontroller
18.2.4 Dead-Band Generator ............................................................................................................. 468
18.2.5 Interrupt/ADC-Trigger Selector ................................................................................................. 468
18.2.6 Synchronization Methods ......................................................................................................... 468
18.2.7 Fault Conditions ...................................................................................................................... 469
18.2.8 Output Control Block ............................................................................................................... 469
18.3 Initialization and Configuration ................................................................................................. 469
18.4 Register Map .......................................................................................................................... 470
18.5 Register Descriptions .............................................................................................................. 472
19 Quadrature Encoder Interface (QEI) ............................................................................... 501
19.1 Block Diagram ........................................................................................................................ 501
19.2 Functional Description ............................................................................................................. 502
19.3 Initialization and Configuration ................................................................................................. 504
19.4 Register Map .......................................................................................................................... 505
19.5 Register Descriptions .............................................................................................................. 505
20 Pin Diagram ...................................................................................................................... 518
21 Signal Tables .................................................................................................................... 519
22 Operating Characteristics ............................................................................................... 534
23 Electrical Characteristics ................................................................................................ 535
23.1 DC Characteristics .................................................................................................................. 535
23.1.1 Maximum Ratings ................................................................................................................... 535
23.1.2 Recommended DC Operating Conditions .................................................................................. 535
23.1.3 On-Chip Low Drop-Out (LDO) Regulator Characteristics ............................................................ 536
23.1.4 Power Specifications ............................................................................................................... 536
23.1.5 Flash Memory Characteristics .................................................................................................. 538
23.2 AC Characteristics ................................................................................................................... 538
23.2.1 Load Conditions ...................................................................................................................... 538
23.2.2 Clocks .................................................................................................................................... 538
23.2.3 Analog-to-Digital Converter ...................................................................................................... 539
23.2.4 Analog Comparator ................................................................................................................. 540
23.2.5 I2C ......................................................................................................................................... 540
23.2.6 Ethernet Controller .................................................................................................................. 541
23.2.7 Hibernation Module ................................................................................................................. 544
23.2.8 Synchronous Serial Interface (SSI) ........................................................................................... 544
23.2.9 JTAG and Boundary Scan ........................................................................................................ 546
23.2.10 General-Purpose I/O ............................................................................................................... 547
23.2.11 Reset ..................................................................................................................................... 548
24 Package Information ........................................................................................................ 550
A
A.1
A.2
A.2.1
A.2.2
A.3
A.3.1
A.3.2
A.3.3
Serial Flash Loader .......................................................................................................... 552
Serial Flash Loader ................................................................................................................. 552
Interfaces ............................................................................................................................... 552
UART ..................................................................................................................................... 552
SSI ......................................................................................................................................... 552
Packet Handling ...................................................................................................................... 553
Packet Format ........................................................................................................................ 553
Sending Packets ..................................................................................................................... 553
Receiving Packets ................................................................................................................... 553
November 30, 2007
7
Preliminary
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