LM3S6965-IQN20A2T Просмотр технического описания (PDF) - Unspecified

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Компоненты Описание

производитель

LM3S6965-IQN20A2T

Microcontroller

Unspecified 

LM3S6965 Microcontroller

List of Tables

Table 1.

Table 3-1.

Table 4-1.

Table 4-2.

Table 5-1.

Table 5-2.

Table 6-1.

Table 7-1.

Table 8-1.

Table 8-2.

Table 8-3.

Table 9-1.

Table 9-2.

Table 9-3.

Table 10-1.

Table 10-2.

Table 10-3.

Table 11-1.

Table 12-1.

Table 12-2.

Table 13-1.

Table 14-1.

Table 15-1.

Table 15-2.

Table 15-3.

Table 16-1.

Table 16-2.

Table 17-1.

Table 17-2.

Table 17-3.

Table 17-4.

Table 18-1.

Table 19-1.

Table 21-1.

Table 21-2.

Table 21-3.

Table 21-4.

Table 22-1.

Table 22-2.

Table 23-1.

Table 23-2.

Table 23-3.

Table 23-4.

Table 23-5.

Table 23-6.

Table 23-7.

Documentation Conventions ............................................................................................ 20

Memory Map ................................................................................................................... 43

Exception Types .............................................................................................................. 45

Interrupts ........................................................................................................................ 46

JTAG Port Pins Reset State ............................................................................................. 50

JTAG Instruction Register Commands ............................................................................... 55

System Control Register Map ........................................................................................... 65

Hibernation Module Register Map ................................................................................... 125

Flash Protection Policy Combinations ............................................................................. 141

Flash Resident Registers ............................................................................................... 142

Flash Register Map ........................................................................................................ 142

GPIO Pad Configuration Examples ................................................................................. 167

GPIO Interrupt Configuration Example ............................................................................ 167

GPIO Register Map ....................................................................................................... 168

Available CCP Pins ........................................................................................................ 205

16-Bit Timer With Prescaler Configurations ..................................................................... 208

Timers Register Map ...................................................................................................... 214

Watchdog Timer Register Map ........................................................................................ 241

Samples and FIFO Depth of Sequencers ........................................................................ 264

ADC Register Map ......................................................................................................... 268

UART Register Map ....................................................................................................... 302

SSI Register Map .......................................................................................................... 347

Examples of I2C Master Timer Period versus Speed Mode ............................................... 377

Inter-Integrated Circuit (I2C) Interface Register Map ......................................................... 386

Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 391

TX & RX FIFO Organization ........................................................................................... 413

Ethernet Register Map ................................................................................................... 416

Comparator 0 Operating Modes ...................................................................................... 454

Comparator 1 Operating Modes ..................................................................................... 455

Internal Reference Voltage and ACREFCTL Field Values ................................................. 455

Analog Comparators Register Map ................................................................................. 457

PWM Register Map ........................................................................................................ 470

QEI Register Map .......................................................................................................... 505

Signals by Pin Number ................................................................................................... 519

Signals by Signal Name ................................................................................................. 523

Signals by Function, Except for GPIO ............................................................................. 528

GPIO Pins and Alternate Functions ................................................................................. 532

Temperature Characteristics ........................................................................................... 534

Thermal Characteristics ................................................................................................. 534

Maximum Ratings .......................................................................................................... 535

Recommended DC Operating Conditions ........................................................................ 535

LDO Regulator Characteristics ....................................................................................... 536

Detailed Power Specifications ........................................................................................ 537

Flash Memory Characteristics ........................................................................................ 538

Phase Locked Loop (PLL) Characteristics ....................................................................... 538

Clock Characteristics ..................................................................................................... 538

November 30, 2007

11

Preliminary

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