LH28F320BFHG Просмотр технического описания (PDF) - Sharp Electronics

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LH28F320BFHG

32M (x16) Flash Memory

Sharp Electronics 

LHF32FDL

9

Table 5. Bus Operation(1, 2)

Mode

Notes RST# CE# OE# WE# Address VPP DQ0-15

Read Array

6

VIH

VIL

VIL

VIH

X

X

DOUT

Output Disable

VIH

VIL

VIH

VIH

X

X

High Z

Standby

VIH

VIH

X

X

X

X

High Z

Reset

3

VIL

X

X

X

X

X

High Z

Read Identifier

Codes/OTP

6

VIH

VIL

VIL

See

See

VIH Table 3 and X Table 3 and

Table 4

Table 4

Read Query

6,7 VIH

VIL

VIL

VIH

See

Appendix

X

See

Appendix

Write

4,5,6 VIH

VIL

VIH

VIL

X

X

DIN

NOTES:

1. Refer to DC Characteristics. When VPP≤VPPLK, memory contents can be read, but cannot be altered.

2. X can be VIL or VIH for control pins and addresses, and VPPLK or VPPH1/2 for VPP. See DC Characteristics for VPPLK

and VPPH1/2 voltages.

3. RST# at GND±0.2V ensures the lowest power consumption.

4. Command writes involving block erase, full chip erase, (page buffer) program or OTP program are reliably executed

when VPP=VPPH1/2 and VCC=2.7V-3.6V.

5. Refer to Table 6 for valid DIN during a write operation.

6. Never hold OE# low and WE# low at the same timing.

7. Refer to Appendix of LH28F320BF series for more information about query code.

Rev. 2.44

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