LH28F320BFHE-PTTL60 Просмотр технического описания (PDF) - Sharp Electronics

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LH28F320BFHE-PTTL60

32M (x16) Flash Memory

Sharp Electronics 

LHF32FB2

4

Symbol

A0-A20

DQ0-DQ15

CE#

RST#

OE#

WE#

WP#/ACC

RY/BY#

VCC

GND

NC

Table 1. Pin Descriptions

Type

Name and Function

INPUT ADDRESS INPUTS: Inputs for addresses. 32M: A0-A20

INPUT/

OUTPUT

DATA INPUTS/OUTPUTS: Inputs data and commands during CUI (Command User

Interface) write cycles, outputs data during memory array, status register, query code,

identifier code and partition configuration register code reads. Data pins float to high-

impedance (High Z) when the chip or outputs are deselected. Data is internally latched

during an erase or program cycle.

INPUT

CHIP ENABLE: Activates the device’s control logic, input buffers, decoders and sense

amplifiers. CE#-high (VIH) deselects the device and reduces power consumption to

standby levels.

INPUT

RESET: When low (VIL), RST# resets internal automation and inhibits write operations

which provides data protection. RST#-high (VIH) enables normal operation. After

power-up or reset mode, the device is automatically set to read array mode. RST# must

be low during power-up/down.

INPUT OUTPUT ENABLE: Gates the device’s outputs during a read cycle.

INPUT

WRITE ENABLE: Controls writes to the CUI and array blocks. Addresses and data are

latched on the rising edge of CE# or WE# (whichever goes high first).

INPUT/

SUPPLY

WRITE PROTECT: When WP#/ACC is VIL, locked-down blocks cannot be unlocked.

Erase or program operation can be executed to the blocks which are not locked and not

locked-down. When WP#/ACC is VIH, lock-down is disabled.

Applying 12V±0.3V to WP#/ACC provides fast erasing or fast programming mode. In

this mode, WP#/ACC is power supply pin. Applying 12V±0.3V to WP#/ACC during

erase/program can only be done for a maximum of 1,000 cycles on each block. WP#/

ACC may be connected to 12V±0.3V for a total of 80 hours maximum. Use of this pin at

12V beyond these limits may reduce block cycling capability or cause permanent

damage.

OPEN DRAIN

OUTPUT

READY/BUSY#: Indicates the status of the internal WSM (Write State Machine). When

low, WSM is performing an internal operation (block erase, full chip erase, (page buffer)

program or OTP program). RY/BY#-High Z indicates that the WSM is ready for new

commands, block erase is suspended and (page buffer) program is inactive, (page buffer)

program is suspended, or the device is in reset mode.

SUPPLY

DEVICE POWER SUPPLY (2.7V-3.6V): With VCC≤VLKO, all write attempts to the

flash memory are inhibited. Device operations at invalid VCC voltage (see DC

Characteristics) produce spurious results and should not be attempted.

SUPPLY GROUND: Do not float any ground pins.

NO CONNECT: Lead is not internally connected; it may be driven or floated.

Rev. 2.44

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