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LAN91C100 Просмотр технического описания (PDF) - SMSC -> Microchip

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LAN91C100
SMSC
SMSC -> Microchip SMSC
LAN91C100 Datasheet PDF : 101 Pages
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BANK SELECT REGISTER
OFFSET
NAME
E
BANK SELECT REGISTER
HIGH
0
0
1
1
BYTE
0
0
1
1
TYPE
READ/WRITE
SYMBOL
BSR
0
0
1
1
0
0
1
1
LOW
BYTE
BS2
BS1
BS0
X
X
X
X
X
0
0
0
BS2, BS1, BS0 Determine the bank presently in
use. This register is always accessible and is
used to select the register bank in use.
The upper byte always reads as 33h and can be
used to help determine the I/O location of
FEAST.
The BANK SELECT REGISTER is always
accessible regardless of the value of BS0-2.
Note that the bank select register can be
accessed as a doubleword at offset Ch, as a
word at offset Eh, or as at offset Fh, however
a doubleword write to offset Ch will write the
BANK SELECT REGISTER but will not write the
registers Ch and Dh.
BANK 7 has no internal registers other than the
BANK SELECT REGISTER itself. On valid
cycles where BANK7 is selected
(BS0=BS1=BS2=1), and A3=0, nCSOUT is
activated to facilitate implementation of external
registers.
Note: BANK7 does not exist in LAN91C9x
devices. For backward S/W compatibility
BANK7 accesses should be done if the Revision
Control register indicates the device is
LAN91C100.
22

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