LAN9116 Просмотр технического описания (PDF) - SMSC -> Microchip
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LAN9116 Datasheet PDF : 126 Pages
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Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Table 2.5 System and Power Signals (continued)
PIN
NO.
NAME
SYMBOL
BUFFER NUM
TYPE
PINS
DESCRIPTION
10
RBIAS
9
Test Pin
2
Internal Regulator
Power
RBIAS
ATEST
VREG
AI
1
PLL Bias: Connect to an external
12.0K ohm 1.0% resistor to ground.
Used for the PLL Bias circuit.
I
1
This pin must be connected to VDD
for normal operation.
P
1
3.3V input for internal voltage
regulator
20,28,
35,
42,48,
55,61,
97
19,27,
34,41,
47,54,
60,96
+3.3V I/O Power
I/O Ground
VDD_IO
GND_IO
P
8
+3.3V I/O logic power supply pins
P
8
Ground for I/O pins
81,85,
+3.3V Analog
VDD_A
P
89
Power
77,80, Analog Ground
VSS_A
P
86,88
3,65
Core Voltage
VDD_CORE
P
Decoupling
1,66
Core Ground
GND_CORE
P
7
PLL Power
VDD_PLL
P
4
PLL Ground
VSS_PLL
P
8
Reference Power
VDD_REF
P
3
+3.3V Analog power supply pins. See
Note 2.1
4
Ground for analog circuitry
2
1.8 V from internal core regulator.
Both pins must be connected
together externally and then tied to a
10uF 0.1-Ohm ESR capacitor, in
parallel with a 0.01uF capacitor to
Ground next to each pin. See
Note 2.1
2
Ground for internal digital logic
1
1.8V Power from the internal PLL
regulator. This external pin must be
connected to a 10uF 0.1-Ohm ESR
capacitor, in parallel with a 0.01uF
capacitor to Ground. See Note 2.1
1
GND for the PLL
1
Connected to 3.3v power and used
as the reference voltage for the
internal PLL
11 Reference Ground
VSS_REF
P
1
Ground for internal PLL reference
voltage
Note 2.1
Please refer to the SMSC application note AN 12.5 titled “Designing with the LAN9118 -
Getting Started”. It is also important to note that this application note applies to the whole
SMSC LAN9118 family of Ethernet controllers. However, subtle differences may apply.
SMSC LAN9116
19
DATASHEET
Revision 1.1 (05-17-05)
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