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ISP1583

Hi-Speed Universal Serial Bus peripheral controller

Philips Electronics 

Philips Semiconductors

ISP1583

Hi-Speed USB peripheral controller

A

B

C

INT pin

GLINTENA = 0

(during this time,

an interrupt event

occurs. For example,

SOF asserted.)

GLINTENA = 1

SOF asserted

GLINTENA = 0

SOF asserted

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Pin INT: HIGH = deassert; LOW = assert (individual interrupts are enabled).

Fig 5. Behavior of bit GLINTENA.

8.13 VBUS sensing

The VBUS pin is one of the ways to wake up the clock when the ISP1583 is suspended

with bit CLKAON set to logic 0 (clock off option).

To detect whether the host is connected or not, that is VBUS sensing, a 1 MΩ resistor

and a 1 µF electrolytic capacitor must be added to damp the overshoot upon plug-in.

55

ISP1583

+

1 MΩ

1 µF

USB

Connector

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Fig 6. Resistor and electrolytic capacitor needed for VBUS sensing.

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9397 750 13461

Product data

Fig 7. Oscilloscope reading: no resistor

and capacitor in the network.

Fig 8. Oscilloscope reading: with

resistor and capacitor in the

network.

Rev. 03 — 12 July 2004

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

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