ISP1181A Просмотр технического описания (PDF) - Philips Electronics
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ISP1181A Datasheet PDF : 70 Pages
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Philips Semiconductors
ISP1181A
Full-speed USB peripheral controller
11. Suspend and resume
11.1 Suspend conditions
The ISP1181A detects a USB suspend status when a constant idle state is present
on the USB bus for more than 3 ms.
The bus-powered devices that are suspended must not consume more than 500 µA
of current. This is achieved by shutting down power to system components or
supplying them with a reduced voltage.
The steps leading up to suspend status are as follows:
1. On detecting a wakeup-to-suspend transition, the ISP1181A sets bit SUSPND in
the Interrupt register. This will generate an interrupt if bit IESUSP in the Interrupt
Enable register is set.
2. When the firmware detects a suspend condition, it must prepare all system
components for the suspend state:
a. All signals connected to the ISP1181A must enter appropriate states to meet
the power consumption requirements of the suspend state.
b. All input pins of the ISP1181A must have a CMOS LOW or HIGH level.
3. In the interrupt service routine, the firmware must check the current status of the
USB bus. When bit BUSTATUS in the Interrupt register is logic 0, the USB bus
has left the suspend mode and the process must be aborted. Otherwise, the next
step can be executed.
4. To meet the suspend current requirements for a bus-powered device, the internal
clocks must be switched off by clearing bit CLKRUN in the Hardware
Configuration register.
5. When the firmware has set and cleared bit GOSUSP in the Mode register, the
ISP1181A enters the suspend state. In powered-off application, the ISP1181A
asserts output SUSPEND and switches off the internal clocks after 2 ms.
Figure 6 shows a typical timing diagram.
9397 750 13959
Product data
Rev. 05 — 08 December 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
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