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ISP1123BD Просмотр технического описания (PDF) - Philips Electronics

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ISP1123BD
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ISP1123BD Datasheet PDF : 49 Pages
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Philips Semiconductors
ISP1123
USB compound hub
Table 2: Pin description for SO32 and SDIP32…continued
Symbol [1]
Pin Type Description
PSW5/GL5/ 18 O
GPSW [3]
mode 5: power switch control output for downstream port 5
(open-drain, 6 mA)
modes 3, 7: GoodLink LED indicator output for downstream
port 5 (open-drain, 6 mA); to connect an LED use a 330
series resistor
modes 0 to 2: gang mode power switch control output
(open-drain, 6 mA)
XTAL1
19 I
crystal oscillator input (6 MHz)
XTAL2
20 O
crystal oscillator output (6 MHz)
RESET [2]
21 I
reset input (Schmitt trigger); a LOW level produces an
asynchronous reset; connect to VCC for power-on reset
(internal POR circuit)
OPTION/SCL 22
I/O mode selection input; also functions as I2C-bus clock output
(open-drain, 6 mA)
INDV/SDA
23 I/O selects individual (HIGH) or global (LOW) power switching
and overcurrent detection; also functions as bidirectional
I2C-bus data line (open-drain, 6 mA)
DM5
24 AI/O downstream port 5 Dconnection (analog) [4]
DP5
25 AI/O downstream port 5 D+ connection (analog) [4]
DM1
26 AI/O downstream port 1 Dconnection (analog) [6]
DP1
27 AI/O downstream port 1 D+ connection (analog) [6]
DM0
28 AI/O upstream port Dconnection (analog)
DP0
29 AI/O upstream port D+ connection (analog)
DM2
30 AI/O downstream port 2 Dconnection (analog) [6]
DP2
31 AI/O downstream port 2 D+ connection (analog) [6]
PSW1/GL1 [3] 32 O
modes 4 to 6: power switch control output for downstream
port 1 (open-drain, 6 mA)
modes 0 to 3, 7: GoodLink LED indicator output for
downstream port 1 (open-drain, 6 mA); to connect an LED
use a 330 series resistor
[1] Symbol names with an overscore (e.g. NAME) indicate active LOW signals.
[2] The voltage at pin Vreg(3.3) is gated by the RESET pin. This allows fully self-powered operation by
connecting RESET to VBUS (+5 V USB supply). If VBUS is lost upstream port D+ will not be driven.
[3] See Table 4 “Mode selection”.
[4] To disable a downstream port connect both D+ and Dto VCC via a 1 Mresistor; unused ports must
be disabled in reverse order starting from port 5.
[5] Analog detection circuit can be switched off using an external EEPROM, see Table 23; in this case,
the pin functions as a logic input (TTL level).
[6] Downstream ports 1 and 2 cannot be disabled.
9397 750 06325
Preliminary specification
Rev. 01 — 5 October 1999
© Philips Electronics N.V. 1999. All rights reserved.
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