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ISL97649AIRZ Просмотр технического описания (PDF) - Intersil

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ISL97649AIRZ Datasheet PDF : 20 Pages
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ISL97649A
Serial Interface Specifications For SCL and SDA Unless Otherwise Noted. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
(Note 14)
TYP
MAX
(Note 7) (Note 14) UNITS
tSU:DAT Input Data Set-up Time
From SDA exiting the 30% to 70% of VIN
40
ns
window, to SCL rising edge crossing 30% of
VIN
tHD:DAT Input Data Hold Time
From SCL rising edge crossing 70% of VIN to
0
ns
SDA entering the 30% to 70% of VIN window
tSU:STO STOP Condition Set-up Time
From SCL rising edge crossing 70% of VIN, to
400
ns
SDA rising edge crossing 30% of VIN
tHD:STO STOP Condition Hold Time for Read, or From SDA rising edge to SCL falling edge;
400
ns
Volatile Only Write
both crossing 70% of VIN
CSCL Capacitive on SCL
5
pF
CSDA Capacitive on SDA
5
pF
tWp Non-Volatile Write Cycle Time
25
ms
EEPROM Endurance
TA= +25°C
1
kCyc
EEPROM Retention
TA = +25°C
88
kHrs
NOTES:
6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
7. Typical values are for TA = +25°C and VIN = 3.3V.
8. LSB = I V255 - V1I / 254. V255 and V1 are the measured voltages for the DCP register set to FF hex and 01 hex respectively.
9. DNL = I Vi+1 - Vi I / LSB-1, i ∈ [1, 255]
10. ZS error = (V1 -VMIN) / LSB. VMIN = (VAVDD*R2) * [1-254*R1/(255*20*RSET)]/ (R1+R2).
11. FS error = (V255 - VMAX) / LSB. VMAX= (VAVDD*R2) * [1-0*R1/(255*20*RSET)]/ (R1+R2).
12. Established by design. Not a parametric spec.
13. Boost will stop switching as soon as boost output reaches OVP threshold.
14. Compliance to limits is assured by characterization and design.
8
FN7928.0
December 5, 2011

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