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ISL97675 Просмотр технического описания (PDF) - Intersil

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ISL97675 Datasheet PDF : 20 Pages
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ISL97675
Pin Descriptions (I = Input, O = Output, S = Supply) (Continued)
PIN NAME
FAULT
COMP
VIN
PWM
EP
PIN NO.
17
18
19
20
21
TYPE
O
I
S
I
S
DESCRIPTION
Gate drive signal for external fault MOSFET. This pin should be left floating when
fault MOSFET is omitted in the application.
External compensation pin.
LED driver supply voltage.
PWM brightness control pin.
Connect Exposed Pad (EP) to junction of AGND and PGND with adequate Vias to
form a star ground.
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL97675IRZ
976 75IRZ
-40 to +85
20 Ld 4x4 QFN
L20.4x4C
NOTES:
1. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL97675. For more information on MSL please
see techbrief TB363.
4
FN7630.0
May 19, 2010

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