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ISL97645(2006) Просмотр технического описания (PDF) - Intersil

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ISL97645
(Rev.:2006)
Intersil
Intersil Intersil
ISL97645 Datasheet PDF : 14 Pages
First Prev 11 12 13 14
ISL97645
Gate Pulse Modulator Circuit
The gate pulse modulator circuit functions as a three way
multiplexer, switching VGHM between ground, VDD1 and
VGH. Voltage selection is provided by digital inputs VDPM
(enable) and VFLK (control). High to low delay and slew
control is provided by external components on pins CE and
RE, respectively. A block diagram of the gate pulse
modulator circuit is shown in Figure 14.
When VDPM is LOW, the block is disabled and VGHM is
grounded. When VDPM is HIGH, the output is determined
by VFLK. When VFLK goes high, VGHM is pulled to VGH by
a 70switch. When VFLK goes low, there is a delay
controlled by capacitor CE, following which VGHM is driven
to VDD1, with a slew rate controlled by resistor RE. Note
that VDD1 is used only as a reference voltage for an
amplifier, thus does not have to source or sink a significant
DC current.
VGH_M
FIGURE 14. GATE PULSE MODULATOR CIRCUIT BLOCK DIAGRAM
11
FN9263.0
April 11, 2006

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