ISL80083 Просмотр технического описания (PDF) - Intersil

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ISL80083

2.5MHz Integrated Power Management IC with I2C Compatible Interface

Intersil 

ISL80083

Package Outline Drawing

W5x5.25B

5X5 ARRAY 25 BALL WITH 0.40 PITCH WAFER LEVEL CHIP SCALE PACKAGE (WLCSP)

Rev 2, 12/11

X

Y

2.13±0.03

0.10

(4X)

2.11±0.03

TOP VIEW

25x 0.225±0.03

E

D

0.40

C

B

PIN 1 (A1 CORNER)

A

0.265

1

0.254

1.60

234

5

BOTTOM VIEW

1.60

0.40

PACKAGE

OUTLINE

0.25

0.225

0.40

3 NSMD

TYPICAL RECOMMENDED LAND PATTERN

0.55 MAX

0.19±0.03

0.10

0.05

ZXY

Z

0.25±0.03

SIDE VIEW

0.305±0.025

Z SEATING PLANE

0.05 Z

NOTES:

1. All dimensions are in millimeters.

2. Dimension and tolerance per ASMEY 14.5M-1994,

and JESD 95-1 SPP-010.

3. NSMD refers to Non-Solder Mask Defined pad design per

Intersil Tech Brief TB451 located at:

http://www.intersil.com/data/tb/tb451.pdf.

21

FN7886.1

May 15, 2013

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