ISL6523(2002) Просмотр технического описания (PDF) - Intersil
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ISL6523 Datasheet PDF : 16 Pages
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ISL6523
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Figures 1, 2 and 3 (Continued)
PARAMETER
UGATE1,2 Sink
LGATE Source
LGATE Sink
PROTECTION
SYMBOL
RUGATE
ILGATE
RLGATE
TEST CONDITIONS
VGATE-PHASE = 1V
VCC = 12V, VLGATE1 = 1V
VLGATE = 1V
MIN TYP MAX UNITS
-
1.7 3.5
Ω
-
1
-
A
-
1.4 3.0
Ω
OCSET1,2 Current Source
Soft-Start Current
POWER GOOD
IOCSET
ISS13,24
VOCSET = 4.5VDC
VSS13,24 = 2.0VDC
170 200 230
µA
-
28
-
µA
VSEN1 Upper Threshold
(VSEN1/DACOUT)
VSEN1 Rising
108
-
110
%
VSEN1 Under-Voltage
(VSEN1/DACOUT)
VSEN1 Rising
92
-
94
%
VSEN1 Hysteresis (VSEN1/DACOUT)
PGOOD Voltage Low
VSEN2 Under-Voltage
VPGOOD
VSEN1 Falling
IPGOOD = -4mA
VSEN2 Rising
-
2
-
%
-
-
0.8
V
1.00
V
VSEN2 Hysteresis
VSEN2 Falling
-
60
-
mV
VTTPG Voltage Low
NOTE:
2. Guaranteed by design
VVTTPG IVTTPG = -4mA
-
-
0.8
V
Typical Performance Curve
140
CUGATE1 = CUGATE2 = CLGATE1 = C
120 VIN = 5V
VCC = 12V
100
C = 4800pF
80
C = 3600pF
60
C = 1500pF
40
20
C = 660pF
0
100 200 300 400 500 600 700 800 900 1000
SWITCHING FREQUENCY (kHz)
FIGURE 4. BIAS SUPPLY CURRENT vs FREQUENCY
Functional Pin Descriptions
VCC (Pin 28)
Provide a 12V bias supply for the IC to this pin. This pin also
provides the gate bias charge for all the MOSFETs
controlled by the IC. The voltage at this pin is monitored for
Power-On Reset (POR) purposes.
GND (Pin 17)
Signal ground for the IC. All voltage levels are measured
with respect to this pin.
PGND (Pin 24)
This is the power ground connection. Tie the synchronous
PWM converter’s lower MOSFET source to this pin.
VAUX (Pin 16)
Connect this pin to the ATX 3.3V output. The voltage present
at this pin is monitored for sequencing purposes. This pin
provides the necessary base bias for the NPN pass
transistors, as well as the current sunk through the 5kΩ VID
pull-up resistors.
SS13 (Pin 13)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 28µA current source, sets the
soft-start interval of the synchronous switching converter
(VOUT1) and the AGP regulator (VOUT3). A VTTPG high
signal is also delayed by the time interval required by the
charging of this capacitor from 0V to 1.25V (see Soft-Start
details).
SS24 (Pin 12)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 28µA current source, sets the
soft-start interval of the standard buck converter. Pulling this
pin below 0.8V induces a chip reset (POR) and shutdown.
VTTPG (Pin 9)
VTTPG is an open collector output used to indicate the
status of the standard buck regulator output voltage. This pin
is pulled low when the output is below the under-voltage
threshold or when the SS13 pin is below 1.25V.
5
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