ISL1221 Просмотр технического описания (PDF) - Intersil

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ISL1221

Real Time Clock/Calendar with Event Detection and Frequency Output

Intersil 

ISL1221

I2C Interface Specifications Test Conditions: VDD = +2.7 to +5.5V, Temperature = -40°C to +85°C, unless otherwise specified. (Continued)

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

(Note 9)

MAX

TYP (Note 5) (Note 9) UNITS NOTES

Rpu

SDA and SCL Bus Pull-up Resistor Maximum is determined by tR

1

Off-chip

and tF.

For Cb = 400pF, max is about

2~2.5kΩ. For Cb = 40pF, max is

about 15~20kΩ

kΩ

7

NOTES:

2. IRQ and FOUT and EVDET Inactive.

3. LPMODE = 0 (default).

4. In order to ensure proper timekeeping, the VDD SR- specification must be followed.

5. Typical values are for T = 25°C and 3.3V supply voltage.

6. VSUP = VDD if in VDD Mode, VSUP = VBAT if in VBAT Mode.

7. These are I2C specific parameters and are not directly tested, however they are used during device testing to validate device specification.

8. A write to register 08h should only be done if VDD > VBAT, otherwise the device will be unable to communicate using I2C.

9. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization

and are not production tested.

SDA vs. SCL Timing

tF

tHIGH

SCL

tSU:STA

SDA

(INPUT TIMING)

tSU:DAT

tHD:STA

SDA

(OUTPUT TIMING)

tLOW

tR

tHD:DAT

tAA

tDH

tSU:STO

tBUF

Symbol Table

WAVEFORM INPUTS

Must be steady

OUTPUTS

Will be steady

May change

from LOW

to HIGH

May change

from HIGH

to LOW

Don’t Care:

Changes Allowed

Will change

from LOW

to HIGH

Will change

from HIGH

to LOW

Changing:

State Not Known

N/A

Center Line is

High Impedance

5

FN6316.1

July 15, 2010

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