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IS62WV25616ALL-70BI

256K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC SRAM

Integrated Silicon Solution 

IS62WV25616ALL, IS62WV25616BLL

ISSI ®

AC WAVEFORMS

WRITE CYCLE NO. 1(1,2) (CS1 Controlled, OE = HIGH or LOW)

ADDRESS

CS1

tWC

tSCS1

tHA

WE

LB, UB

DOUT

DIN

tAW

tPWE

tPWB

tSA

tHZWE

DATA UNDEFINED

HIGH-Z

tLZWE

tSD

tHD

DATA-IN VALID

Notes:

1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CS1 and WE inputs and at

least one of the LB and UB inputs being in the LOW state.

2. WRITE = (CS1) [ (LB) = (UB) ] (WE).

WRITE CYCLE NO. 2 (WE Controlled: OE is HIGH During Write Cycle)

tWC

ADDRESS

OE

CS1

tSCS1

tHA

WE

LB, UB

DOUT

DIN

tAW

t PWE

tSA

tHZWE

DATA UNDEFINED

HIGH-Z

tLZWE

tSD

tHD

DATA-IN VALID

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

9

Rev. C

05/02/05

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