HM62V16258BLTT-8SL Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics
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HM62V16258BLTT-8SL Datasheet PDF : 16 Pages
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HM62V16258B Series
Write Cycle
HM62V16258B
-7
-8
Parameter
Symbol Min
Max
Min
Max
Unit
Notes
Write cycle time
t WC
70
—
85
—
ns
Address valid to end of write
t AW
60
—
70
—
ns
Chip selection to end of write
t CW
60
—
70
—
ns
5
Write pulse width
t WP
50
—
55
—
ns
4
LB, UB valid to end of write
t BW
55
—
70
—
ns
Address setup time
t AS
0
—
0
—
ns
6
Write recovery time
t WR
0
—
0
—
ns
7
Data to write time overlap
t DW
30
—
35
—
ns
Data hold from write time
t DH
0
—
0
—
ns
Output active from end of write tOW
5
—
5
—
ns
2
Output disable to output in High-Z tOHZ
0
25
0
25
ns
1, 2
Write to output in high-Z
t WHZ
0
25
0
25
ns
1, 2
Notes: 1. tCHZ, tOHZ, tWHZ and tBHZ are defined as the time at which the outputs achieve the open circuit
conditions and are not referred to output voltage levels.
2. This parameter is sampled and not 100% tested.
3. At any given temperature and voltage condition, tHZ max is less than tLZ min both for a given device
and from device to device.
4. A write occures during the overlap of a low CS, a low WE and a low LB or a low UB. A write begins
at the latest transition among CS going low, WE going low and LB going low or UB going low. A
write ends at the earliest transition among CS going high, WE going high and LB going high or UB
going high. tWP is measured from the beginning of write to the end of write.
5. tCW is measured from the later of CS going low to the end of write.
6. tAS is measured from the address valid to the beginning of write.
7. tWR is measured from the earliest of CS or WE going high to the end of write cycle.
8
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