IDT7M1014S20GB Просмотр технического описания (PDF) - Integrated Device Technology

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IDT7M1014S20GB

4K x 36 BiCMOS DUAL-PORT STATIC RAM MODULE

Integrated Device Technology 

IDT7M1014 4K x 36 BiCMOS

DUAL-PORT STATIC RAM MODULE

MILITARY AND COMMERCIAL TEMPERATURE RANGES

TIMING WAVEFORM OF WRITE CYCLE (EITHER SIDE) (1,2)

ADDRESS

OE

tWC

tAW

tOHZ (3)

tAS

R/ W

tWP

tWR

tWHZ

tOW

DATAOUT

(4)

DATAIN

tDW

tDH

DATA VALID

NOTES:

1. R/W is HIGH during all address transitions.

2. If OE is LOW during the write cycle, the write pulse width must be the larger of tWP or (tWZ + tDW) to allow the I/O drivers to turn

off and data to be placed on the bus for the required tDW. If OE is HIGH, this requirement does not apply, and the write pulse

can be as short as the specified tWP.

3. This parameter is guaranteed by design but not tested.

4. During this period, the I/O pins are in the output state and input signals must not be applied.

(4)

2819 drw 08

7.03

7

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