IN74LV32D Просмотр технического описания (PDF) - Integral Corp.

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IN74LV32D

Quad 2-Input OR Gate

Integral Corp. 

CHIP PAD DIAGRAM IZ74LV32

IN74LV32

12 11 10

13

14

01

02

03 04

09

Chip marking

25LV32

08 (x=1.009; y=0.727)

07

06

05

1.23 ±0.03

Pad size 0.108 x 0.108 mm (Pad size is given as per metallization layer)

Thickness of chip 0.46 ± 0,02 mm

PAD LOCATION

Pad No

01

02

03

04

05

06

07

08

09

10

11

12

13

14

Symbol

A1

B1

Y1

A2

B2

Y2

GND

Y3

A3

B3

Y4

A4

B4

Vcc

X

0.111

0.111

0.504

0.672

1.009

1.009

1.009

1.009

1.009

0.672

0.504

0.336

0.111

0.111

Y

0.287

0.119

0.111

0.111

0.111

0.277

0.447

0.806

0.974

0.974

0.974

0.974

0.772

0.618

INTEGRAL

6

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