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IN74ACT112N

DUAL J-K FLIP-FLOP WITH SET AND RESET

Integral Corp. 

IN74ACT112

DUAL J-K FLIP-FLOP

WITH SET AND RESET

High-Speed Silicon-Gate CMOS

The IN74ACT112 is identical in pinout to the LS/ALS112,

HC/HCT112. The IN74ACT112 may be used as a level converter

for interfacing TTL or NMOS outputs to High Speed CMOS

inputs.

Each flip-flop is negative-edge clocked and has active-low

asynchronous Set and Reset inputs.

• TTL/NMOS Compatible Input Levels

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 4.5 to 5.5 V

• Low Input Current: 1.0 µA; 0.1 µA @ 25°C

• Outputs Source/Sink 24 mA

LOGIC DIAGRAM

ORDERING INFORMATION

IN74ACT112N Plastic

IN74ACT112D SOIC

TA = -40° to 85° C for all

packages

PIN ASSIGNMENT

PIN 16=VCC

PIN 8 = GND

FUNCTION TABLE

Inputs

Outputs

Set Reset Clock J K

Q

Q

L

H

X

XX H

L

H

L

L

L

H

H

H

H

H

H

X

XX L

H

X

XX

L*

L*

L L No Change

LH L

H

HL H

L

H

H

HH

Toggle

H

H

L

X X No Change

H

H

H

X X No Change

H

H

X X No Change

* Both outputs will remain low as long as Set and

Reset are low, but the output states are

unpredictable if Set and Reset go high

simultaneously

X = Don’t Care

1

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