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IDT74FCT3807Q

3.3V CMOS 1-TO-10 CLOCK DRIVER

Integrated Device Technology 

IDT74FCT3807/A

3.3V CMOS 1-TO-10 CLOCK DRIVER

TEST WAVEFORMS

INPUT

OUTPUT

tPLH

tR

tPHL

tF

3V

1.5V

0V

VOH

2.0V

1.5V

0.8V VOL

Package Delay

COMMERCIAL/INDUSTRIAL TEMPERATURE RANGES

INPUT

OUTPUT 1

OUTPUT 2

tPLH1

tPHL1

tSK(o)

tSK(o)

tPLH2

tPHL2

3V

1.5V

0V

VOH

1.5V

VOL

VOH

1.5V

VOL

tSK(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|

Output Skew - tSK(O)

INPUT

OUTPUT

tPLH

tPHL

tSK(p) = |tPHL - tPLH|

Pulse Skew - tSK(P)

3V

1.5V

0V

VOH

1.5V

VOL

INPUT

PACKAGE 1 OUTPUT

PACKAGE 2 OUTPUT

tPLH1

tPHL1

tSK(t)

tSK(t)

tPLH2

tPHL2

3V

1.5V

0V

VOH

1.5V

VOL

VOH

1.5V

VOL

tSK(t) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|

Package Skew - tSK(T)

Package 1 and Package 2 are same device type and speed grade

ENABLE

CONTROL

INPUT

OUTPUT

NORMALLY

LOW

t PZL

S W ITCH

CLOSED

t PZH

3.5V

1.5V

DISABLE

t PLZ

t PHZ

0.3V

3V

1.5V

0V

3.5V

V OL

OUTPUT

NORMALLY

HIGH

S W ITCH

OPEN

1.5V

0V

0.3V VOH

0V

Enable and Disable Times

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH

2. Pulse Generator for All Pulses: f ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns

7

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