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IDT72V3612(2014) Просмотр технического описания (PDF) - Integrated Device Technology

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IDT72V3612
(Rev.:2014)
IDT
Integrated Device Technology IDT
IDT72V3612 Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
3.3 VOLT CMOS SyncBiFIFOTM
64 x 36 x 2
IDT72V3612
FEATURES:
Two independent clocked FIFOs (64 x 36 storage capacity each)
buffering data in opposite directions
Supports clock frequencies up to 83 MHz
Fast access times of 8ns
Free-running CLKA and CLKB can be asynchronous or
coincident (simultaneous reading and writing of data on a
single clock edge is permitted)
Mailbox bypass Register for each FIFO
Programmable Almost-Full and Almost-Empty Flags
Microprocessor interface control logic
EFA , FFA , AEA , and AFA flags synchronized by CLKA
EFB , FFB , AEB , and AFB flags synchronized by CLKB
Passive parity checking on each port
Parity generation can be selected for each port
Available in space saving 120-pin thin quad flat package (TQFP)
Green parts available, see ordering information
DESCRIPTION:
The IDT72V3612 is designed to run off a 3.3V supply for exceptionally low-
power consumption. This device is a monolithic high-speed, low-power CMOS
bi-directional clocked FIFO memory. It supports clock frequencies up to 83 MHz
and has read access times as fast as 8ns. The FIFO operates in IDT Standard
mode. Two independent 64 x 36 dual-port SRAM FIFOs on board the chip
buffer data in opposite directions. Each FIFO has flags to indicate empty and
full conditions and two programmable flags (Almost-Full and Almost-Empty) to
FUNCTIONAL BLOCK DIAGRAM
CLKA
CSA
W/RA
ENA
MBA
Port-A
Control
Logic
Mail 1
Register
Parity
Gen/Check
MBF1
PEFB
PGB
RST
ODD/
EVEN
Device
Control
FFA
AFA
36
FS0
FS1
A0 - A35
EFA
AEA
RAM
ARRAY
64 x 36
FIFO1
Write Read
Pointer Pointer
Status Flag
Logic
FIFO2
Programmable Flag
Offset Register
Status Flag
Logic
Read Write
Pointer Pointer
36
EFB
AEB
B0 - B36
FFB
AFB
36
RAM
ARRAY
64 x 36
PGA
PEFA
MBF2
Parity
Gen/Check
Mail 2
Register
Port-B
Control
Logic
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc. SyncBiFIFO is a trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
1
©2014 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.
CLKB
CSB
W/RB
ENB
MBB
4659 drw 01
JANUARY 2014
DSC-4659/5

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