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IDT723674

CMOS SyncBiFIFO™ WITH BUS-MATCHING 2,048 x 36 x 2 4,096 x 36 x 2 8,192 x 36 x 2

Integrated Device Technology 

IDT723654/723664/723674 CMOS SyncBiFIFOTM WITH BUS-MATCHING

2,048 x 36 x 2, 4,096 x 36 x 2 and 8,192 x 36 x 2

COMMERCIAL TEMPERATURE RANGE

PIN DESCRIPTIONS (CONTINUED)

Symbol

W/RA

W/RB

Name

Port-A Write/

Read Select

Port-B Write/

Read Select

I/O

Description

I

A HIGH selects a write operation and a LOW selects a read operation on Port A for a LOW-to-HIGH

transition of CLKA. The A0-A35 outputs are in the HIGH impedance state when W/RA is HIGH.

I

A LOW selects a write operation and a HIGH selects a read operation on Port B for a LOW-to-HIGH

transition of CLKB. The B0-B35 outputs are in the HIGH impedance state when W/RB is LOW.

6

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