IDT71256S/L
CMOS STATIC RAM 256K (32K x 8-BIT)
LOW VCC DATA RETENTION WAVEFORM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DATA
RETENTION
VCC
4.5V
MODE
4.5V
tCDR
VDR ≥2V
tR
CS
VIH
VIH
VDR
2946 drw 06
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ± 10%, All Temperature Ranges)
71256L20(1)
71256S25 71256S30(3)
71256L25 71256L30(3)
71256S35
71256L35
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Min. Max.
Read Cycle
tRC
Read Cycle Time
20 —
25 — 30 — 35 —
tAA
Address Access Time
— 20
— 25 — 30 — 35
tACS
tCLZ(2)
tCHZ(2)
Chip Select Access Time
Chip Select to Output in Low-Z
Chip Deselect to Output in High-Z
— 20
5—
— 10
— 25 — 30 — 35
5— 5 — 5 —
— 11 — 15 — 15
tOE
tOLZ(2)
tOHZ(2)
Output Enable to Output Valid
Output Enable to Output in Low-Z
Output Disable to Output in High-Z
— 10
2—
2
8
— 11 — 13 — 15
2— 2 — 2 —
2 10 2 12 2 15
tOH
Output Hold from Address Change
5—
5— 5 — 5 —
Write Cycle
tWC
Write Cycle Time
20 —
25 — 30 — 35 —
tCW
Chip Select to End-of-Write
15 —
20 — 25 — 30 —
tAW
Address Valid to End-of-Write
15 —
20 — 25 — 30 —
tAS
Address Set-up Time
0—
0— 0 — 0 —
tWP
Write Pulse Width
15 —
20 — 25 — 30 —
tWR
Write Recovery Time
0—
0— 0 — 0 —
tDW
tWHZ(2)
Data to Write Time Overlap
Write Enable to Output in High-Z
11 —
— 10
13 — 14 — 15 —
— 11 — 15 — 15
tDH
Data Hold from Write Time
0—
0— 0 — 0 —
tOW(2) Output Active from End-of-Write
5—
5— 5 — 5 —
NOTES:
1. 0° to +70°C temperature range only.
2. This parameter guaranteed by device characterization, but is not production tested.
3. –55° to +125°C temperature range only.
71256S45
71256L45
Min. Max. Unit
45 — ns
— 45 ns
— 45 ns
5 — ns
— 20 ns
— 20 ns
0 — ns
— 20 ns
5 — ns
45 — ns
40 — ns
40 — ns
0 — ns
35 — ns
0 — ns
20 — ns
— 20 ns
0 — ns
5 — ns
2946 tbl 11
7.2
5