IDT70P35 Просмотр технического описания (PDF) - Integrated Device Technology
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IDT70P35
Integrated Device Technology
IDT70P35 Datasheet PDF : 22 Pages
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IDT70P35/34L(IDT70P25/24L)
High-Speed 1.8V 8/4K x 18 (8/4K x 16) Dual-Port Static RAM
ADVANCED
Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (VDD = 1.8V ± 100mV)
70P35/34L20
(70P25/24L20)
Com'l Only
70P35/34L25
(70P25/24L25)
Com'l
& Ind
Symbol
Parameter
Test Condition
Version
Typ.(2) Max. Typ.(2) Max. Unit
IDD Dynamic Operating
Current
(Both Ports Active)
CE = VIL, Outputs Disabled
SEM = VIH
f = fMAX(3)
COM'L
L 25
40
20
32 mA
IND
L 25
46
20
38
ISB1 Standby Current
(Both Ports - TTL
Level Inputs)
CER and CEL = VIH
SEMR = SEML = VIH
f = fMAX(3)
COM'L
L 3.5
5.6
2.2
3.5 mA
IND
L 3.5
6.0
2.2
4.6
ISB2 Standby Current
(One Port - TTL
Level Inputs)
CE"A" = VIL and CE"B" = VIH(1)
Active Port Outputs Disabled,
f=fMAX(3)
SEMR = SEML = VIH
COM'L
L 15
25
12
20
mA
IND
L 15
32
12
26
ISB3 Full Standby Current
(Both Ports -
CMOS Level Inputs)
Both Ports CEL and
CER > VDD - 0.2V,
VIN > VDD - 0.2V or
VIN < 0.2V, f = 0(4)
SEMR = SEML > VDD-0.2V
COM'L
L 4.5
7.5
3
IND
L 4.5
7.5
3
mA
5
5
ISB4 Full Standby Current
(One Port -
CMOS Level Inputs)
CE"A" < 0.2V and
CE"B" > VDD - 0.2V(1)
SEMR = SEML > VDD-0.2V
VIN > VDD - 0.2V or VIN < 0.2V
Active Port Outputs Disabled,
f = fMAX(3)
COM'L
L 15
25
12
mA
20
IND
L
15
32
12
26
NOTES:
5683 tbl 09
1. Port "A" may be either left or right port. Port "B" is the opposite from port "A".
2. VDD = 1.8V, TA = +25°C, and are not production tested. IDD dc = 15mA (typ.)
3. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC, and using “AC Test Conditions” of input levels of GND
to 3V.
4. f = 0 means no address or control lines change.
AC Test Conditions
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 1.8V
3ns Max.
0.9V
0.9V
Figure 1
5683 tbl 10
30pF
1.8V
13500Ω
10800Ω
5683 drw 07
Figure 1. AC Output Test Load
*(For tLZ, tHZ, tWZ, tOW)
Timing of Power-Up Power-Down
CE
tPU
ICC
50%
ISB
6.1402
tPD
50%
5683 drw 07 ,
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