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RF2905 Просмотр технического описания (PDF) - RF Micro Devices

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RF2905 Datasheet PDF : 22 Pages
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The quad tank of the discriminator can be implemented
with ceramic discriminators available from a couple of
sources. This design works well for wideband applica-
tions and where the temperature range is limited. The
temperature coefficient of a ceramic discriminator can
be in the order of +/- 50ppm per degree C. An auto-
matic frequency control loop can be implemented
using the DC level of the FM OUT for feedback to an
external varactor on the reference crystal. An alterna-
tive to the ceramic discriminator is a LC tank. Figure 2
shows a schematic implementation of a LC tank.
28
C17 7 pF
27
C16 10 nF
39 pF
3.3 µH
4-22
pF
R
opt.
Figure 2. LC Type Discriminator Circuit
The DEMOD IN pin has a DC bias on it and must be
DC blocked. This can be done either at the pin or at the
ground side of the LC tank (this must also be done if a
parallel resistor is used with a ceramic discriminator).
The decision whether to used a LC or a ceramic dis-
criminator should be based upon the frequency devia-
tion in the system, discriminator Q needed, and
frequency and temperature tolerances. Tuning of the
LC tank is required to overcome the component toler-
ances in the tank.
PREDICTING AND MINIMIZING PLL LOCK TIME
The RF2905 implements a conventional PLL on chip,
with a VCO followed by a prescaler dividing the output
frequency down to be compared with a signal from the
reference oscillator. The output of the phase discrimi-
nator is a sequence of pulse width modulated current
pulses in the required direction to steer the VCO’s con-
trol voltage to maintain phase lock, with a loop filter
integrating the current pulses. The lock time of this PLL
is a combination of the loop transient response time
and the slew rate set by the phase discriminator output
current combined with the magnitude of the loop filter
capacitance. A good approximation for total lock time
of the RF29.5 is:
Lock time=D/fc+35000*C*dV
Where D is a factor to account for the loop damping.
For loops with low phase margin (30° to 40°), use D=2
whereas for loops with better phase margin (50° to
60°), use D=1. fc is the loop cut frequency. C is the
sum of all shunt capacitors in the loop filter. dV is the
required step voltage change to produce the desired
frequency change during the transient.
Rev B11 010516
RF2905
To lock faster, we need to minimize C.
1. To this end, use the divide by 128 rather than the
64, and a correspondingly lower frequency refer-
ence crystal to achieve the desired output fre-
quency.
2. Design the loop filter for the minimum phase margin
possible without causing loop instability problems;
this allows C to be kept at a minimum.
3. Design the loop filter for the highest loop cut fre-
quency possible without distorting low frequency
modulation components; this also allows C to be
kept at a minimum.
CRYSTAL SELECTION
Several issues arise in the selection of the crystals.
Timing specifications such as start-up and switching
are related to the crystal specifications, as well as
external circuitry. The tolerance of the crystals are also
an issue in optimum radio performance. In general,
tighter tolerance crystals lead to better performance
and are more critical to higher data rates. Frequency
offsets between the TX crystal, RX crystal and discrim-
inator generate duty cycle variations in the receive
demodulator.
The crystals used on the RF2905 evaluation boards
are specified as a parallel resonant, 30pF crystal with
a maximum ESR of 80. The initial tolerance is
+20ppm and temperature stability is +30ppm for -10°C
to 70°C. The transistor oscillator will work with a variety
11 of different crystals and the final crystal specifications
should be evaluated for each application.
Faster start-up or switching times are achievable by
specifying crystals with low motion inductance and low
motional resistance. Additionally, the feedback caps of
the oscillator can be changed to increase the voltage
on the crystal. Generally, crystals in the leaded
HC-49U packages will provide better start-up times
than the smaller surface-mount types used on the eval-
uation board.
11-63

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