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HN58X2402SFPIAG Просмотр технического описания (PDF) - Renesas Electronics

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HN58X2402SFPIAG
Renesas
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HN58X2402SFPIAG Datasheet PDF : 18 Pages
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HN58X2402SFPIAG/HN58X2404SFPIAG
Acknowledge
All addresses and data words are serially transmitted to and from in 8-bit words. The receiver sends a zero to
acknowledge that it has received each word. This happens during ninth clock cycle. The transmitter keeps bus open to
receive acknowledgment from the receiver at the ninth clock. In the write operation, EEPROM sends a zero to
acknowledge after receiving every 8-bit words. In the read operation, EEPROM sends a zero to acknowledge after
receiving the device address word. After sending read data, the EEPROM waits acknowledgment by keeping bus open.
If the EEPROM receives zero as an acknowledge, it sends read data of next address. If the EEPROM receives
acknowledgment "1" (no acknowledgment) and a following stop condition, it stops the read operation and enters a
stand-by mode. If the EEPROM receives neither acknowledgment "0" nor a stop condition, the EEPROM keeps bus
open without sending read data.
Acknowledge Timing Waveform
SCL
SDA IN
SDA OUT
1
2
8
9
Acknowledge
out
Rev.4.00, Jul.13.2005, page 9 of 16

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