HM628512B Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics

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HM628512B

4 M SRAM (512-kword x 8-bit)

Hitachi -> Renesas Electronics 

HM628512B Series

Revision Record

Rev.

0.0

0.1

1.0

2.0

3.0

Date

Apr. 24, 1998

Nov. 19, 1998

Jan. 13, 1999

Apr. 8, 1999

Aug. 24, 1999

Contents of Modification

Initial issue

DC Characteristics

ISB1 max: 40/20 µA to 100/50 µA

Low VCC Data Retention Characteristics

ICCDR max: 20/10 µA to 50/15 µA

Change of note1 and 2

Deletion of Preliminary

Features

Change of Power dissipation

Standby: TBD (typ) to 10 µW (typ)

DC Characteristics

ISB1 typ: TBD/TBD to 2/2 µA

Low VCC Data Retention Characteristics

ICCDR typ: TBD/TBD to 1/1 µA

Addition of L-UL-version

DC Characteristics

ISB1 typ: 2/2 µA to 2/2/2 µA

ISB1 max: 100/50 µA to 100/50/20 µA

Addition of note4

Low VCC Data Retention Characteristics

ICCDR typ: 1/1 µA to 1/1/1 µA

ICCDR max: 50/15 µA to 50/15/10 µA

Addition of note3

Low VCC Data Retention Characteristics

Correct error: tR unit ms to ns

Drawn by

M. Higuchi

S. kunito

Approved by

K. Imato

K. Imato

S. kunito K. Imato

S. kunito K. Makuta

18

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