HM514170DTT Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics

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HM514170DTT

262,144-word × 16-bit Dynamic RAM

Hitachi -> Renesas Electronics 

HM51(S)4170D Series, HM51(S)4270D Series

Block Diagram

I/O4

I/O4

buffer

I/O5

I/O5

buffer

I/O3

I/O3

buffer

I/O2

I/O2

buffer

I/O1

I/O1

buffer

I/O0

I/O0

buffer

I/O6

I/O6

buffer

I/O7

I/O7

buffer

Selector

Selector

I/O15 I/O14 I/O13 I/O12

I/O15 I/O14 I/O13 I/O12

buffer buffer buffer buffer

I/O11

buffer

I/O11

I/O10

buffer

I/O10

I/O9

buffer

I/O9

Selector

I/O8

buffer

I/O8

Selector

Row

driver

Row Row

driver driver

Row

driver

Row

driver

Row Row

driver driver

Row

driver

CAS

RAS

Row decoder & Peripheral circuit

UWE

LWE

OE

Row

driver

Row Row

driver driver

Row

driver

Row

driver

Row Row

driver driver

Row

driver

Row address buffer

RA0 to RA9: HM51(S)4170D

RA0 to RA8: HM51(S)4270D

Column address buffer

CA0 to CA7: HM51(S)4170D

CA0 to CA8: HM51(S)4270D

Address A0 to A9: HM51(S)4170D

Address A0 to A8: HM51(S)4270D

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