HIP6020A(1999) Просмотр технического описания (PDF) - Intersil

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HIP6020A
(Rev.:1999)

Advanced Dual PWM and Dual Linear Power Controller

Intersil 

HIP6020A

PUPPER

=

I--O-----2----×-----r--D----S----(--O-----N----)---×-----V----O-----U----T-- + I--O------×-----V----I--N-----×-----t--S----W------×-----F----S--

VIN

2

PLOWER = I--O-----2----×-----r--D----S----(--O-----N---V-)---×-I-N---(---V----I--N-----–----V-----O----U----T----)

The rDS(ON) is different for the two equations above even if

the same device is used for both. This is because the gate

drive applied to the upper MOSFET is different than the

lower MOSFET. Figure 13 shows the gate drive where the

upper MOSFET’s gate-to-source voltage is approximately

VCC less the input supply. For +5V main power and +12VDC

for the bias, the gate-to-source voltage of Q1 is 7V. The lower

gate drive voltage is +12VDC. A logic-level MOSFET is a

good choice for Q1 and a logic-level MOSFET can be used for

Q2 if its absolute gate-to-source voltage rating exceeds the

maximum voltage applied to VCC.

+12V

+5V OR LESS

VCC

HIP6020A

UGATE

PHASE

-

LGATE

+

PGND

GND

Q1

NOTE:

VGS ≈ VCC -5V

Q2

CR1

NOTE:

VGS ≈ VCC

FIGURE 10. UPPER GATE DRIVE - DIRECT VCC DRIVE

Rectifier CR1 is a clamp that catches the negative inductor

swing during the dead time between the turn off of the lower

MOSFET and the turn on of the upper MOSFET. The diode

must be a Schottky type to prevent the lossy parasitic

MOSFET body diode from conducting. It is acceptable to omit

the diode and let the body diode of the lower MOSFET clamp

the negative inductor swing, but efficiency could drop, in some

cases, one or two percent as a result. The diode's rated

reverse breakdown voltage must be greater than the

maximum input voltage.

PWM2 MOSFET and Schottky Selection

The power dissipation in PWM2 converter is similar to

PWM1 except that the power losses of the lower device are

taking place in a Schottky instead of a MOSFET. The power

losses of PWM2 converter are distributed between the upper

MOSFET and the Schottky. The following equations

describe an approximation of this distribution and assume a

linear voltage-current switching transitions.

PMOS

=

I--O-----2----×-----r--D----S----(--O-----N----)---×-----V----O-----U----T-- + I--O------×-----V----I--N-----×-----t--S----W------×-----F----S--

VIN

2

PSCH = I--O------×-----V----f---×-----(-V-V---I-I-N-N------–----V----O-----U----T----)

For the fully on option (SELECT pin high) selection of the

MOSFET is based on the voltage budget available to this

regulator. Since the MOSFET is operated as a switch, its

own rDS(ON) is bound by the maximum voltage drop

allowable across it at the maximum output current.

Where

rDS(ON)max

=

V-----I--N-----–----(---D-----C----R------⋅---I--O-----U----T---)-

IOUT

rDS(ON)max - maximum allowed MOSFET rDS(ON)

DCR - output inductor DC resistance

In applications where both output settings could be engaged

(both 1.5V and fully on MOSFET) it is recommended the

MOSFET meets criteria outlined for the PWM operation as

well as the fully on operation.

Linear Controllers Transistor Selection

The HIP6020A linear controllers are compatible with both

NPN bipolar as well as N-Channel MOSFET transistors. The

main criteria for selection of pass transistors for the linear

regulators is package selection for efficient removal of heat.

The power dissipated in a linear regulator is

PLINEAR = IO × (VIN – VOUT)

Select a package and heatsink that maintains the junction

temperature below the maximum desired temperature with

the maximum expected ambient temperature.

When selecting bipolar NPN transistors for use with the

linear controllers, insure the current gain at the given

operating VCE is sufficiently large to provide the desired

output load current when the base is fed with the minimum

driver output current.

4-14

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