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HFA3863

Direct Sequence Spread Spectrum Baseband Processor

Intersil 

HFA3863

performance of the CCK modes. The losses in both figures

include RF and IF radio losses; they do not reflect the

HFA3863 losses alone. The HFA3863 baseband

processing losses from theoretical are, by themselves, a

small percentage of the overall loss.

The PRISM demodulator performs with an implementation

loss of less than 4dB from theoretical in a AWGN

environment with low phase noise local oscillators. For the

1 and 2Mbps modes, the observed errors occurred in

groups of 4 and 6 errors. This is because of the error

extension properties of differential decoding and

descrambling. For the 5.5 and 11Mbps modes, the errors

occur in symbols of 4 or 8 bits each and are further

extended by the descrambling. Therefore the error patterns

are less well defined.

7

8

THY 1, 2

Eb/N0

9

10

11

12

1.E+00

1.E-01

BER 2.0

1.E-02

BER 1.0

1.E-03

1.E-04

1.E-05

1.E-06

1.E-07

1.E-08

FIGURE 14. BER vs Eb/N0 PERFORMANCE FOR PSK MODES

Eb/N0

5 6 7 8 9 10 11 12 13 14

1.E+00

1.E-01

1.E-02

BER 11

1.E-03

1.E-04 THY 11

1.E-05

THY 5.5

BER 5.5

1.E-06

1.E-07

1.E-08

1.E-09

FIGURE 15. BER vs Eb/N0 PERFORMANCE FOR CCK MODES

Clock Offset Tracking Performance

The PRISM baseband processor is designed to accept data

clock offsets of up to ±25ppm for each end of the link (TX

and RX). This effects both the acquisition and the tracking

performance of the demodulator. The budget for clock offset

error is 0.75dB at ±50ppm. No appreciable degradation was

seen for operation in AWGN at ±50ppm. Symbol tracking is

accomplished by one of two methods. If both ends of the link

employ locked oscillators for their bit timing and carrier

frequency generation, symbol tracking is done by dividing

down the carrier frequency offset. If either one of the ends of

the link do not have locked oscillators, then symbol tracking

is done by a conventional early-late chip tracking method.

Carrier Offset Frequency Performance

The correlators used for acquisition for all modes and for

demodulation in the 1 and 2Mbps modes are time invariant

matched filter correlators otherwise known as parallel

correlators. They use two samples per chip and are tapped

at every other shift register stage. Their performance with

carrier frequency offsets is determined by the phase roll rate

due to the offset. For an offset of +50ppm (combined for both

TX and RX) will cause the carrier to phase roll 22.5 degrees

over the length of the correlator. This causes a loss of

0.22dB in correlation magnitude which translates directly to

Eb/N0 performance loss. In the PRISM chip design, the

carrier phase locked loop is inactive during acquisition.

During tracking, the carrier tracking loop corrects for offset,

so that no degradation is noted. In the presence of high

multipath and high SNR, however, some degradation is

expected.

RSSI Performance

The RSSI value is reported on CR62 in hex and is linear with

signal level in dB. Figure 16 shows the RSSI curve

measured on a whole evaluation radio. This takes into

account the full gain adjust range of all radio parts. To get

signal level in dBm on a radio, simply subtract the RSSI

value in decimal from 100.

4-20

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