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HD74LS390 Просмотр технического описания (PDF) - Renesas Electronics

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HD74LS390
Renesas
Renesas Electronics Renesas
HD74LS390 Datasheet PDF : 6 Pages
1 2 3 4 5 6
HD74LS390
Dual Decade Counters
REJ03D0485-0400
Rev.4.00
May 10, 2006
This circuit contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters.
The HD74LS390 incorporates dual divide-by-two and divide-by-five counters, which can be used to implement cycle
lengths equal to any whole and / or cumulative multiples of 2 and / or 5 up to divide-by-100. When connected as a bi-
quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output
stage.
Features
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS390P
DILP-16 pin
PRDP0016AE-B
P
(DP-16FV)
HD74LS390FPEL SOP-16 pin (JEITA)
PRSP0016DH-B
(FP-16DAV)
FP
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
Pin Arrangement
1A 1
1Clear 2
1QA
Output
3
1B 4
1QB 5
Outputs 1QC 6
1QD 7
GND 8
CLR
1QA
1A
1B
1QB
1QC
1QD
CLR
2QA
2A
2B
2QB
2QC
2QD
16 VCC
15 2A
14 2Clear
13
2QA
Output
12 2B
11 2QB
10 2QC Outputs
9 2QD
(Top view)
Rev.4.00, May 10, 2006, page 1 of 5

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