HD64F3029 Просмотр технического описания (PDF) - Renesas Electronics

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HD64F3029

16-Bit Single-Chip Microcomputer

Renesas Electronics 

Item

Page

Revision (See Manual for Details)

18.4.2 Programming/Erasing 596

Interface Register

(6) Flash Transfer Destination

Address Register (FTDAR)

Table amended

Bit 7

TDER

0

1

Description(Return Value after Download)

Setting of TDA6 to TDA0 is normal

(Initial value)

Setting of TDER and TDA6 to TDA0 is H'04 to H'FF and download has been

aborted

18.10.1 Serial Communication 652

Interface Specification for Boot

Mode

• Inquiry and Selection States

(2) Device Selection

Description amended

— Size (1 byte) : Amount of device-code data

This is fixed to 4

(11) New Bit-Rate Selection

657, 658

Description amended

—Number of multiplication ratios (1 byte) : The

number of multiplication ratios to which the device

can be set. Normally the value is two: main

operating frequency and peripheral module

operating frequency. (Should be set to H'01 for

this LSI.)

— Multiplication ratio 2 (1 byte) : The value of

multiplication or division ratios for the peripheral

frequency

— Multiplication ratio (1 byte) : The value of the

multiplication ratio (e.g. when the clock

frequency is multiplied by four, the

multiplication ratio will be H'04. Cannot be set

for this LSI.)

• Programming

663

Figure18.27 Programming

Sequence

Figure amended

Programming selection (H'42, H'43 )

(3) 128-byte Programming

664

Description amended

— Programming Address (4 bytes) : Start address

for programming

Multiple of the size specified in response to the

programming unit inquiry

(i.e. H'00, H'01, H'00, H'00 : H'00010000)

19.2.2 External Clock Input 693

External Clock

Table 19.3 Clock Timing

Table amended

Item

Clock low pulse width

Test Conditions

Figure 21.13

Clock high pulse width

Rev. 2.0, 06/04, page iv of xxiv

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