HD6473644H Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics

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HD6473644H

(HD6433644 Series) H8/3644 Series Hardware Manual

Hitachi -> Renesas Electronics 

2.8 Memory Map ..................................................................................................................... 49

2.9 Application Notes.............................................................................................................. 50

2.9.1 Notes on Data Access........................................................................................... 50

2.9.2 Notes on Bit Manipulation ................................................................................... 52

2.9.3 Notes on Use of the EEPMOV Instruction .......................................................... 58

Section 3 Exception Handling........................................................................................ 59

3.1 Overview............................................................................................................................ 59

3.2 Reset .................................................................................................................................. 59

3.2.1 Overview .............................................................................................................. 59

3.2.2 Reset Sequence..................................................................................................... 59

3.2.3 Interrupt Immediately after Reset ........................................................................ 61

3.3 Interrupts............................................................................................................................ 61

3.3.1 Overview .............................................................................................................. 61

3.3.2 Interrupt Control Registers ................................................................................... 63

3.3.3 External Interrupts................................................................................................ 72

3.3.4 Internal Interrupts ................................................................................................. 72

3.3.5 Interrupt Operations.............................................................................................. 73

3.3.6 Interrupt Response Time ...................................................................................... 78

3.4 Application Notes.............................................................................................................. 79

3.4.1 Notes on Stack Area Use...................................................................................... 79

3.4.2 Notes on Rewriting Port Mode Registers............................................................. 80

Section 4 Clock Pulse Generators................................................................................. 83

4.1 Overview............................................................................................................................ 83

4.1.1 Block Diagram...................................................................................................... 83

4.1.2 System Clock and Subclock ................................................................................. 83

4.2 System Clock Generator.................................................................................................... 84

4.3 Subclock Generator ........................................................................................................... 87

4.4 Prescalers ........................................................................................................................... 88

4.5 Note on Oscillators ............................................................................................................ 88

Section 5 Power-Down Modes ...................................................................................... 89

5.1 Overview............................................................................................................................ 89

5.1.1 System Control Registers ..................................................................................... 92

5.2 Sleep Mode........................................................................................................................ 96

5.2.1 Transition to Sleep Mode ..................................................................................... 96

5.2.2 Clearing Sleep Mode ............................................................................................ 96

5.2.3 Clock Frequency in Sleep (Medium-Speed) Mode.............................................. 96

5.3 Standby Mode.................................................................................................................... 97

5.3.1 Transition to Standby Mode ................................................................................. 97

5.3.2 Clearing Standby Mode........................................................................................ 97

5.3.3 Oscillator Settling Time after Standby Mode is Cleared...................................... 98

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