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GS8160V36AT-200 Просмотр технического описания (PDF) - Giga Semiconductor

Номер в каталоге
Компоненты Описание
производитель
GS8160V36AT-200
GSI
Giga Semiconductor GSI
GS8160V36AT-200 Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
TQFP Pin Description
Symbol
Type
A0, A1
I
A
I
DQA
DQB
DQC
I/O
DQD
BW
I
BA, BB, BC, BD
I
CK
I
GW
I
E1, E3
I
E2
I
G
I
ADV
I
ADSP, ADSC
I
ZZ
I
FT
I
LBO
I
VDD
I
VSS
I
VDDQ
I
NC
Preliminary
GS8160V18/32/36AT-350/333/300/250/200/150
Description
Address field LSBs and Address Counter preset Inputs
Address Inputs
Data Input and Output pins
Byte WriteWrites all enabled bytes; active low
Byte Write Enable for DQA, DQB Data I/Os; active low
Clock Input Signal; active high
Global Write EnableWrites all bytes; active low
Chip Enable; active low
Chip Enable; active high
Output Enable; active low
Burst address counter advance enable; active low
Address Strobe (Processor, Cache Controller); active low
Sleep Mode control; active high
Flow Through or Pipeline mode; active low
Linear Burst Order mode; active low
Core power supply
I/O and Core Ground
Output driver power supply
No Connect
Rev: 1.00a 6/2003
5/24
© 2003, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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