GL824C-MXGXX Просмотр технического описания (PDF) - GENESYS LOGIC

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GL824C-MXGXX

USB 2.0 On-The-Go Controller

GENESYS LOGIC 

GL824/GL824C USB 2.0 On-The-Go Controller

LIST OF FIGURES

FIGURE 3.1 - 208 PIN LQFP PINOUT DIAGRAM .............................................................12

FIGURE 3.2 – 128 PIN LQFP PINOUT DIAGRAM.............................................................13

FIGURE 4.1 - GL824 BLOCK DIAGRAM ..........................................................................24

FIGURE 5.1 - ONE BYTE RECEIVE/TRANSMIT TIMING DIAGRAM (CLOCK OPPOSITE)... 26

FIGURE 5.2 - ONE BYTE RECEIVE/TRANSMIT TIMING DIAGRAM (CLOCK NORMAL)....... 26

FIGURE 5.3 - CONTINUES RECEIVE/TRANSMIT DATA TIMING DIAGRAM (CLOCK

OPPOSITE) ......................................................................................................................26

FIGURE 5.4 - CONTINUES RECEIVE/TRANSMIT DATA TIMING DIAGRAM (CLOCK

NORMAL) ........................................................................................................................ 26

FIGURE 5.5 - DATA FRAME.............................................................................................27

FIGURE 5.6 - COMMAND WRITE TIMING DIAGRAM .......................................................28

FIGURE 5.7 - STATUS READ TIMING DIAGRAM ..............................................................28

FIGURE 5.8 - DATA WRITE TIMING DIAGRAM ...............................................................29

FIGURE 5.9 - DATA READ TIMING DIAGRAM .................................................................29

FIGURE 6.1 – EMBEDDED PMOS SWITCH ARCHITECTURE............................................32

FIGURE 6.2 – I-V CURVE OF PMOS SWTICH .................................................................33

FIGURE 6.3 – TRANSIENT ANALYSIS OF PMOS SWITCH ................................................34

FIGURE 6.4 – TIMING DIAGRAM OF EXTERNAL FLASH ..................................................34

FIGURE 6.5 - TIMING DIAGRAM OF SMARTMEDIA.........................................................35

FIGURE 6.6 - TIMING DIAGRAM OF XD-PICTURE ...........................................................36

FIGURE 6.7 - TIMING DIAGRAM OF MEMORYSTICK ......................................................37

FIGURE 6.8 - TIMING DIAGRAM OF MEMORYSTICK PRO..............................................37

FIGURE 6.9 - TIMING DIAGRAM OF SD / MMC ..............................................................37

FIGURE 6.10 - TIMING DIAGRAM OF COMPACTFLASH...................................................38

FIGURE 6.11 - TIMING DIAGRAM OF RESET ...................................................................39

FIGURE 6.12 – REGISTER TRANSFERS TIMING...............................................................41

FIGURE 6.13 - INITIATING A MULTIWORD DMA DATA BURST ......................................43

FIGURE 6.14 - SUSTAINING A MULTIWORD DMA DATA BURST .....................................44

FIGURE 6.15 - DEVICE TERMINATING A MULTIWORD DMA DATA BURST ....................44

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