FT2232D Просмотр технического описания (PDF) - Unspecified
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FT2232D Datasheet PDF : 61 Pages
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Document No.: FT_000173
FT2232D DUAL USB TO SERIAL UART/FIFO IC Datasheet
Version 2.05
Clearance No.: FTDI# 127
3.3 IO Pin Definitions by Chip Mode
The FT2232D will default to dual serial mode (232 UART mode on both channel A and B, if no external
EEPROM is used, or the external EEPROM is blank. The definition of the following pins varies according to
the chip‟s mode:-
Channel A
Pin#
Generic
Pin
name
232
UART
Mode
245
FIFO
Pin Definitions by Chip Mode **Note 2
Enhanced
Asynchronous
and
Synchronous
Serial
MPSSE
**Note 4
MCU
Host Bus
Emulatio
n Mode
**Note 5
Fast
Opto-
Isolated
Serial
Mode
CPU
FIFO
Interfac
e Mode
24
ADBUS0 TXD
D0
D0
TCK/SK **Note 3 D0
D0
AD0
23
ADBUS1 RXD
D1
D1
TDI/D0
AD1
D1
D1
22
ADBUS2 RTS#
D2
D2
TDO/DI AD2
D2
D2
21
ADBUS3 CTS#
D3
D3
TMS/CS D3
D3
AD3
20
ADBUS4 DTR#
D4
D4
GPIOL0
AD4
D4
D4
19
ADBUS5 DSR#
D5
D5
GPIOL1
AD5
D5
D5
17
ADBUS6 DCD#
D6
D6
GPIOL2
AD6
D6
D6
16
ADBUS7 RI#
D7
D7
GPIOL3
AD7
D7
D7
15
ACBUS0 TXDEN RXF#
WR# **Note 6 GPIOH0 I/O0
CS#
CS#
13
ACBUS1 SLEEP# TXE#
RD# **Note 6 GPIOH1 I/O1
A0
A0
12
ACBUS2 RXLED# RD#
WR# **Note 7 GPIOH2 IORDY
RD#
RD#
24
ADBUS0 TXD
D0
D0
TCK/SK
AD0
**Note 3 D0
11
ACBUS3 TXLED# WR
RD# **Note 7 GPIOH3 OSC
WR#
WR#
10
SI/WUA SI/WUA SI/WUA SI/WUA
**Note 8 **Note 8 **Note 8 **Note 8
Table 3.5.5 Pin Definition by Chip Mode (Channel A)
**Note 2: 232 UART, 245 FIFO, CPU FIFO Interface, and Fast Opto-Isolated modes are
enabled in the external EEPROM. Enhanced Asynchronous and Synchronous Bit-Bang modes,
MPSSE, and MCU Host Bus Emulation modes are enabled using the driver command set bit
mode. See Section 3.3 for details.
**Note 3: Channel A can be configured in another IO mode if channel B is in Fast Opto-
Isolated Serial Mode. If both Channel A and Channel B are in Fast Opto-Isolated Serial Mode all
of the IO will be on Channel B.
**Note 4: MPSSE is Channel A only.
**Note 5: MCU Host Bus Emulation requires both Channels.
**Note 6: The Bit-Bang Mode (synchronous and asynchronous) WR# and RD# strobes are on
these pins when the main Channel mode is 245 FIFO, CPU FIFO interface, or Fast Opto-Isolated
Serial Modes.
**Note 7: The Bit-Bang Mode (synchronous and asynchronous) WR# and RD# strobes are on
these pins when the main Channel mode is 232 UART Mode.
Copyright © 2010 Future Technology Devices International Limited
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