LTC1594L(RevA) Просмотр технического описания (PDF) - Linear Technology

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LTC1594L
(Rev.:RevA)

4- and 8-Channel, 3V Micropower Sampling 12-Bit Serial I/O A/D Converters

Linear Technology 

LTC1594L/LTC1598L

APPLICATIONS INFORMATION

OVERVIEW

The LTC1594L/LTC1598L are 3V micropower, 12-bit

sampling A/D converters that feature 4- and 8-channel

multiplexers respectively. They typically draw only 160µA

of supply current when sampling at 10.5kHz. Supply

current drops linearly as the sample rate is reduced (see

Supply Current vs Sample Rate). The ADCs automatically

power down when not performing conversions, drawing

only leakage current. The LTC1594L is available in a

16-pin narrow SO package and the LTC1598L is pack-

aged in a 24-pin SSOP. Both devices operate on a single

supply from 2.7V to 3.6V.

The LTC1594L/LTC1598L contain a 12-bit, switched-

capacitor ADC, sample-and-hold, serial port and an

external reference input pin. In addition, the LTC1594L

has a 4-channel multiplexer and the LTC1598L provides

an 8-channel multiplexer (see Block Diagram). They can

measure signals floating on a DC common mode voltage

and can operate with reduced spans to 1.5V. Reducing

the spans allow them to achieve 366µV resolution.

The LTC1594L/LTC1598L provide separate MUX output

and ADC input pins to form an ideal MUXOUT/ADCIN

loop which economizes signal conditioning. The MUX

and ADC of the devices can also be controlled individually

through separate chip selects to enhance flexibility.

SERIAL INTERFACE

For this discussion, we will assume that CSMUX and

CSADC are tied together and will refer to them as simply

CS, unless otherwise specified.

The LTC1594L/LTC1598L communicate with the micro-

processor and other external circuitry via a synchronous,

half duplex, 4-wire interface (see Operating Sequences in

Figures 1 and 2).

CSMUX = CSADC = CS

CLK

tCYC

tsuCS

DIN

DOUT

CH0 TO

CH7

ADCIN =

MUXOUT

COM = GND

EN

D1

DON’T CARE

D2

D0

NULL

Hi-Z

BIT

B11 B10 B9

B8

B7

B6

B5

B4

B3 B2

B1 B0*

Hi-Z

tSMPL

tCONV

tON

*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW,

THE ADC WILL OUTPUT LSB-FIRST DATA THEN FOLLOWED WITH ZEROS INDEFINITELY

1594F/98F F01

Figure 1. LTC1594L/LTC1598L Operating Sequence Example: CH2, GND

10

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