BRIGHT
Microelectronics
Inc.
Preliminary BM29F040
Embedded Erase Algorithm
Start
Write Program Command Sequence
(see below)
Data poll Device
Data = FFH
No
?
Yes
Erasure
Completed
Figure 3. Embedded Programming Algorithm
Note: See Data Polling Algorithm in Figure 5
Chip Erase Command Sequence
(Address/Data)
Individual Sector/Multiple Sector Erase
Command Sequence (Address/Data)
First Write cycle
Second Write cycle
Third Write cycle
Fourth Write cycle
Fifth Write cycle
Sixth Write cycle
5555H/ AAH
First Write cycle
5555H/ AAH
2AAAH/ 55H
5555H/ 80H
5555H/ AAH
2AAAH/ 55H
5555H/ 10H
Second Write cycle
Third Write cycle
2AAAH/ 55H
5555H/ 80H
Fourth Write cycle
5555H/ AAH
Fifth Write cycle
2AAAH/ 55H
Sixth Write cycle Sector Address/ 30H
Additional
Sector erase
commands are
optional
Sector Address/ 30H
Sector Address/ 30H
Figure 4. Automated Erase Flow Chart and Sequence
A Winbond Company
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Publication Release Date: May 1999
Revision A1