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AN-6920MR

Integrated Critical-Mode PFC / Quasi-Resonant Current-Mode PWM Controller FAN6920

Fairchild Semiconductor 

AN-6920

Figure 4. Frequency Variation of BCM PFC

Since the design of line filter and inductor for a BCM PFC

converter with variable switching frequency should be at

minimum frequency condition, it is worthwhile to examine

how the minimum frequency of BCM PFC converter

changes with operating conditions.

Figure 5 shows the minimum switching frequency, which

occurs at the peak of line voltage, as a function of the RMS

line voltage for different output voltage settings. For

universal line application, the minimum switching

frequency occurs at high line (265VAC) as long as the output

voltage is lower than about 405V.

Figure 5. Minimum Switching Frequency vs. RMS Line

Voltage (L = 780µH, POUT = 100W)

APPLICATION NOTE

3. Operation Principle of Dual-

Switch Quasi-Resonant Flyback

Converter

Dual-switch QR flyback converter topology derived from a

conventional square wave high/low side pulse-width

modulated (PWM), dual-switch flyback converter have

leakage inductance recycling loop, so that primary-side

snubber can remove, and can recycle the energy of the

leakage inductance stored during switch’s turn-on period.

This is especially suitable for high-power (up to 200W) and

slim-type applications. Figure 6 and Figure 7 show the

simplified circuit diagram of a dual-switch quasi-resonant

flyback converter and its typical waveforms. The basic

operation principles are:

When primary power switches turn on, input voltage

(VIN) is applied across the primary-side inductor (Lm).

MOSFET current (IDS) increases linearly from zero to

the peak value (Ipk). During this time, the energy is

drawn from the input and stored in the inductor.

When the primary power switches turn off, leakage

inductance of the transformer produces a voltage spike

on the PWM switches and causes a drain voltage

increase to the VIN voltage. Clamped to this level, the

leakage inductance energy stored during PWM switches

turning on could be released by diode (D1, D2) and the

voltage on the primary-side winding is clamped to VIN.

Therefore, the energy stored in the inductor forces the

rectifier diode (D3) to turn on. During the diode ON

time (tD), the output voltage (Vo) is applied across the

secondary-side inductor and the diode current (ID)

decreases linearly from the peak value to zero. At the

end of tD, all the energy stored in the inductor has been

delivered to the output. During this period, the output

voltage is reflected to the primary side as Vo × NP/NS.

The sum of input voltage (VIN) and reflected output

voltage (Vo× Np/Ns) is imposed across the MOSFETs.

The voltage on the primary-side winding is clamped to

VIN. If the voltage of input is too low, the voltage of

secondary side could be lower than output voltage

target (VIN < NP/NS×VO), and the output voltage would

follow input voltage drop.

When the inductor current reaches zero, the drain-to-

source voltage (VDS) begins to resonate by the

resonance between the primary-side inductor (Lm) and

the MOSFET output capacitor (Coss1, Coss2) with an

amplitude of Vo× Np/Ns on the offset of VIN, as depicted

in Figure 7. Quasi-resonant switching is achieved by

turning on the MOSFET when VDS reaches its

minimum value. This reduces the MOSFET turn-on

switching loss caused by the capacitance loading

between the drain and source of the MOSFET.

© 2010 Fairchild Semiconductor Corporation

Rev. 1.0.0 • March 10, 2011

3

www.fairchildsemi.com

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