LTC1287 Просмотр технического описания (PDF) - Linear Technology

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LTC1287

3V Single Chip 12-Bit Data Acquisition System

Linear Technology 

LTC1287

BLOCK DIAGRA

8

VCC

INPUT

SHIFT

REGISTER

+IN

–IN

2

3

ANALOG

INPUT MUX

4

GND

SAMPLE

AND

HOLD

COMP

12-BIT

CAPACITIVE

DAC

5

VREF

7

CLK

OUTPUT

SHIFT

REGISTER

6

DOUT

12-BIT

SAR

CONTROL

AND

TIMING

1

CS

LTC1287 BD

TEST CIRCUITS

On and Off Channel Leakage Current

3V

ION

A

ON CHANNEL

IOFF

A

OFF CHANNEL

6

POLARITY

LTC1287 TC1

Load Circuit for tdis and ten

TEST POINT

DOUT

3k

100pF

3V tdis WAVEFORM 2, ten

tdis WAVEFORM 1

LTC1287 TC05

Load Circuit for tdDO, tr and tf

1.5V

DOUT

3k

100pF

TEST POINT

LTC1287 TC02

Voltage Waveforms for DOUT Delay Time, tdDO

CLK

DOUT

0.45V

tdDO

2.1V

0.6V

LTC1287 TC03

Voltage Waveforms for DOUT Rise and Fall Times, tr, tf

2.1V

DOUT

0.6V

tr

tf

LTC1287 TC04

Voltage Waveforms for tdis

CS

2.1V

DOUT

WAVEFORM 1

(SEE NOTE 1)

DOUT

WAVEFORM 2

(SEE NOTE 2)

90%

tdis

10%

LTC1287 TC06

NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH

THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL.

NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH

THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL.

1287fa

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