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CXB1561Q-Y Просмотр технического описания (PDF) - Sony Semiconductor

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CXB1561Q-Y Datasheet PDF : 23 Pages
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CXB1561Q-Y
Pin Description
Pin
No.
Typical pin voltage
Symbol
DC
AC
1 VccD 0V
2 VEED –5V
Equivalent circuit
3 UP
–1.3V
4 DOWN –1.3V
1k
100 100
3
200
4
200
0.8mA 0.8mA
Description
Positive power supply
pin for digital block.
Negative power supply
pin for digital block.
VCCA
VEEA
Resistor connection pins
for alarm level setting.
UP pin: When the
resistance connection to
this pin is increased, the
alarm level becomes
higher.
DOWN pin: When the
resistance connected to
this pin is increased, the
alarm level becomes
lower.
5 CAP2 –1.8V
6 CAP3 –1.8V
7 VEE
8 SD
–5V
–0.9V
to
–1.7V
9 SD
–0.9V
to
–1.7V
Capacitance connection
5
6
pins for alarm block peak
VCCA hold circuit.
80
80
(Each pin incorporates a
capacitance of
approximately 10pF.)
CAP2 pin: Peak hold
capacitance connection
pin for the post-amplifier
signal output.
5µA
5µA
CAP3 pin: Peak hold
capacitance connection
20µA
VEEA pin for the alarm level
setting block.
Negative power supply pin.
VCCD
8
9
VEED
Alarm output pins.
Terminate these pins in
510at VEE.
10 VEEDB –5V
11 VCCDB 0V
Negative power supply
pin for differential circuit.
Positive power supply pin
for differential circuit.
–3–

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