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DS28E10 Просмотр технического описания (PDF) - Maxim Integrated

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производитель
DS28E10
MaximIC
Maxim Integrated MaximIC
DS28E10 Datasheet PDF : 17 Pages
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ABRIDGED DATA SHEET
1-Wire SHA-1 Authenticator
1-Wire Bus System
The 1-Wire bus is a system that has a single bus master
and one or more slaves. In all instances the DS28E10
is a slave device. The bus master is typically a micro-
controller. The discussion of this bus system is broken
down into three topics: hardware configuration, transac-
tion sequence, and 1-Wire signaling (signal types and
timing). The 1-Wire protocol defines bus transactions in
terms of the bus state during specific time slots, which
are initiated on the falling edge of sync pulses from the
bus master.
Hardware Configuration
The 1-Wire bus has only a single line by definition; it is
important that each device on the bus be able to drive
it at the appropriate time. To facilitate this, each device
attached to the 1-Wire bus must have open-drain or
three-state outputs. The 1-Wire port of the DS28E10
is open drain with an internal circuit equivalent to that
shown in Figure 7.
A multidrop bus consists of a 1-Wire bus with multiple
slaves attached. The DS28E10 supports both a standard
and overdrive communication speed of 15.4kbps (max)
and 125kbps (max), respectively. The value of the pullup
resistor primarily depends on the network size and load
conditions. The DS28E10 requires a pullup resistor of
2.2kI (max) at any speed.
The idle state for the 1-Wire bus is high. If for any reason
a transaction must be suspended, the bus must be left
in the idle state if the transaction is to resume. If this
does not occur and the bus is left low for more than 16Fs
(overdrive speed) or more than 120Fs (standard speed),
one or more devices on the bus could be reset.
Transaction Sequence
The protocol for accessing the DS28E10 through the
1-Wire port is as follows:
• Initialization
• ROM Function Command
• Memory/SHA-1 Function Command
• Transaction/Data
Initialization
All transactions on the 1-Wire bus begin with an initializa-
tion sequence. The initialization sequence consists of a
reset pulse transmitted by the bus master followed by a
presence pulse(s) transmitted by the slave(s). The pres-
ence pulse lets the bus master know that the DS28E10
is on the bus and is ready to operate. For more details,
see the 1-Wire Signaling section.
1-Wire ROM Function Commands
Once the bus master has detected a presence, it can
issue one of the seven ROM function commands that
the DS28E10 supports. All ROM function commands are
8 bits long. A list of these commands follows (see the
flowchart in Figure 8). Under certain conditions, the ROM
function commands may not operate properly right after
power-up. See the Applications Information section for a
method to ensure proper operation.
Read ROM [33h]
The Read ROM command allows the bus master to read
the DS28E10’s 8-bit family code, unique 48-bit serial
number, and 8-bit CRC. This command can only be used
if there is a single slave on the bus. If more than one
slave is present on the bus, a data collision occurs when
BUS MASTER
Rx
Tx
OPEN-DRAIN
PORT PIN
VPUP
RPUP
Rx = RECEIVE
Tx = TRANSMIT
DS28E10 1-Wire PORT
DATA
Rx
IL
Tx
100MOSFET
Figure 7. Hardware Configuration
13

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