DS28E10 Просмотр технического описания (PDF) - Maxim Integrated

Номер в каталоге

Компоненты Описание

производитель

DS28E10

1-Wire SHA-1 Authenticator

Maxim Integrated 

ABRIDGED DATA SHEET

1-Wire SHA-1 Authenticator

TOP VIEW

IO 1

DS28E10

3 GND

VCC 2

SOT23-3

Pin Configurations

+

GND 1

IO 2

VCC 3

DS28E10

TSOC

6 N.C.

5 N.C.

4 N.C.

PIN

SOT23

TSOC

1

2

2

3

3

1

—

4, 5, 6

Pin Description

NAME

IO

VCC

GND

N.C.

FUNCTION

1-Wire Bus Interface. Open drain; requires external pullup resistor.

Supply Pin for Operating Power

Ground Supply for the Device

Not Connected

Detailed Description

The DS28E10 combines a 512-bit SHA-1 engine, security

data, 224 bits of one-time programmable (OTP) EPROM,

and a 64-bit ROM ID in a single chip. Data is transferred

serially through the 1-Wire protocol, which requires only

a single data lead and a ground return. In addition to its

important use as a unique data value in cryptographic

SHA-1 computations, the device’s 64-bit ROM ID can

be used to electronically identify the equipment in which

the DS28E10 is used. The ROM ID also serves as node

address in a multidrop 1-Wire network environment

where multiple devices reside on a common 1-Wire bus

and operate independently of each other.

Overview

The block diagram in Figure 1 shows the relationships

between the major control and memory sections of the

device. The device has six main data components: 64-bit

ROM ID, security data, challenge buffer, 28 bytes of OTP

user EPROM memory, special function registers, and a

512-bit SHA-1 engine. Figure 2 shows the hierarchical

structure of the 1‑Wire protocol. The bus master must

first provide one of the seven ROM (network) function

commands: 1) Read ROM, 2) Match ROM, 3) Search

ROM, 4) Skip ROM, 5) Resume (communication), 6)

Overdrive-Skip ROM or 7) Overdrive-Match ROM. Upon

completion of an Overdrive-Skip ROM or Overdrive-

Match ROM command executed at standard speed,

the device enters overdrive mode where all subsequent

communication occurs at a higher speed. The protocol

required for these ROM function commands is described

in Figure 8. After a ROM function command is success-

fully executed, the memory and SHA-1 functions become

accessible and the master can provide any one of the

six available function commands. The protocol for these

commands is described in Figure 6. All data is read and

written least significant bit first.

4

Share Link: