DS2290 Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated
Номер в каталоге
Компоненты Описание
Список матч
DS2290 Datasheet PDF : 9 Pages
| |||
DS2290
CUSTOMER SIDE PIN DESCRIPTION Table 2
PIN SYMBOL I/O
DESCRIPTION
1,2
VDD
3
LCLK
– Positive Supply. 5.0 Volts.
I
Loopback Clock. Clock for loopback data. Internally pulled low by 100KΩ.
4
LPOS
5
LNEG
I
Loopback Bipolar Data. Sampled on the falling edge of LCLK if LB is tied
high. Internally pulled low by 100KΩ.
6
TCLK
I
Transmit Clock. Apply a 1.544 MHz (±32 ppm) clock here.
7
TPOS
8
TNEG
I
Transmit Bipolar Data. Data that is to be transmitted. Sampled on the falling
edge of TCLK when LB is tied low or left open. TPOS and TNEG can be tied
together for an NRZ data input.
9
LB
I
Loopback Enable. Tie high to transmit data from LPOS and LNEG; tie low or
leave open to transmit data from TPOS and TNEG. Internally pulled low by
100K ohm.
11
LB2
12
LB1
13
LB0
I
Line Build Out Select. State determines whether the transmitted signal has
0, –7.5, or –15 dB of line build out. See Table 3. LB0 and LB1 are internally
pulled high by 100KΩ; LB2 is pulled low by 100KΩ. If all three build out pins
are left open, the default state is 0 dB.
14
TAIS
I
Transmit Alarm Indication Signal. Tie high to transmit an unframed all ones
signal at either the TCLK (LB=0) or LCLK (LB=1) rate. Internally pulled low by
100KΩ.
15
B8ZS
I
B8ZS Enable. Tie high to enable B8ZS encoding; tie low or leave open to
disable B8ZS encoding. Internally pulled low by 100KΩ.
19
RX+
20
RX–
O Receive Analog Output. Protected differential T1 signal output here.
22,23 GND
– Ground. 0.0 volts.
NOTE: Do not connect any signal to pins 10, 16, 17, 18, 21, and 24.
LINE BUILD OUT SELECTS Table 3
LINE BUILD OUT SELECTS
LB0
LB1
LB2
0 dB
1
1
0
–7.5 dB
1
0
0
–15 dB
0
1
0
SINGLE IN–LINE CONNECTOR
The DS2290 is designed to connect directly into a
30–position single in–line connector. These connectors
are available from a number of vendors.
022798 6/9
Share Link: 