CY7C68000-56PVC(2004) Просмотр технического описания (PDF) - Cypress Semiconductor

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CY7C68000-56PVC
(Rev.:2004)

TX2™ USB 2.0 UTMI Transceiver

Cypress Semiconductor 

PRELIMINARY

CY7C68000

9.0 AC Electrical Characteristics

9.1 USB 2.0 Transceiver

USB 2.0 certified in FS and HS.

9.2 Timing Diagram

9.2.1

HS/FS Interface Timing–60 MHz

CLK

Control_In

TCSU_MIN

TCH_MIN

DataIn

Control_Out

TDSU_MIN

TDH_MIN

TCCO

DataOut

TCDO

Figure 9-1. 60-MHz Interface Timing Constraints

Table 9-1. 60-MHz Interface Timing Constraints Parameters

Parameter

TCSU_MIN

TCH_MIN

TDSU_MIN

TDH_MIN

TCCO

TCDO

Description

Minimum set-up time for TXValid

Minimum hold time for TXValid

Minimum set-up time for Data (transmit direction)

Minimum hold time for Data (transmit direction)

Clock to Control out time for TXReady, RXValid,

RXActive and RXError

Clock to Data out time (Receive direction)

Min.

Typ.

8

1

8

1

1

1

Max.

8

8

Unit

ns

ns

ns

ns

ns

ns

Notes

Document #: 38-08016 Rev. *E

Page 9 of 14

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