IS61C632A-5PQ Просмотр технического описания (PDF) - Integrated Silicon Solution

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IS61C632A-5PQ

32K x 32 SYNCHRONOUS PIPELINED STATIC RAM

Integrated Silicon Solution 

IS61C632A

ISSI®

WRITE CYCLE SWITCHING CHARACTERISTICS (Over Operating Range)

Symbol Parameter

tKC

Cycle Time

tKH

Clock High Time

tKL

Clock Low Time

tAS

Address Setup Time

tSS

Address Status Setup Time

tWS

Write Setup Time

tDS

Data In Setup Time

tCES Chip Enable Setup Time

tAVS

Address Advance Setup Time

tAH

Address Hold Time

tSH

Address Status Hold Time

tDH

Data In Hold Time

tWH

Write Hold Time

tCEH Chip Enable Hold Time

tAVH Address Advance Hold Time

tCFG

Configuration Setup(1)

-4

Min. Max.

8—

4—

4—

2.5 —

2.5 —

2.5 —

2.5 —

2.5 —

2.5 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

25 —

-5

Min. Max.

10 —

4—

4—

2.5 —

2.5 —

2.5 —

2.5 —

2.5 —

2.5 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

35 —

-6

Min. Max.

12 —

4—

4—

2.5 —

2.5 —

2.5 —

2.5 —

2.5 —

2.5 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

45 —

Notes:

1. Configuration signal MODE is static and must not change during normal operation.

-7

Min. Max.

13 —

6—

6—

2.5 —

2.5 —

2.5 —

2.5 —

2.5 —

2.5 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

0.5 —

52 —

-8

Min. Max. Unit

15 — ns

6 — ns

6 — ns

2.5 — ns

2.5 — ns

2.5 — ns

2.5 — ns

2.5 — ns

2.5 — ns

0.5 — ns

0.5 — ns

0.5 — ns

0.5 — ns

0.5 — ns

0.5 — ns

60 — ns

10

Integrated Silicon Solution, Inc.

SR001-1B

05/18/98

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