CY7C195B Просмотр технического описания (PDF) - Cypress Semiconductor

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CY7C195B

256 Kb (64K x 4) Static RAM

Cypress Semiconductor 

Write Cycle No. 1 (WE Controlled) 2 13 14 15

Address

CE

tSA

WE

tWC

tSCE

tAW

tPWE

OE

tHZOE

Data In/Out

Undefined

see footnotes

Write Cycle No. 2 (CE Controlled)16 17 18

Address

CE

tSA

WE

Data In/Out

High Z

tSD

Data-In Valid

tWC

tSCE

tAW

tSD

Data-In Valid

CY7C194B

CY7C195B

tHA

tHD

tHA

tHD

High Z

Notes:

13. This cycle is WE controlled, OE is HIGH during write.

14. Data In/Out is high impedance if OE = VIH.

15. During this period the I/Os are in output state and input signals should not be applied.

16. This cycle is CE controlled.

17. Data In/Out is high impedance if OE = VIH.

18. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.

Document #: 38-05409 Rev. *A

Page 9 of 13

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