CY7C1352B-80AC Просмотр технического описания (PDF) - Cypress Semiconductor
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CY7C1352B-80AC Datasheet PDF : 12 Pages
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PRELIMINARY
CY7C1352B
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ..................................... −65°C to +150°C
Ambient Temperature with
Power Applied .................................................. −55°C to +125°C
Supply Voltage on VDD Relative to GND .........−0.5V to +4.6V
DC Voltage Applied to Outputs
in High Z State[7] .....................................−0.5V to VDDQ + 0.5V
DC Input Voltage[7]..................................−0.5V to VDDQ + 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage .......................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current .................................................... >200 mA
Operating Range
Range
Com’l
Ambient
Temperature[8]
0°C to +70°C
VDD/VDDQ
3.3V ± 5%
Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
VDD
VDDQ
VOH
VOL
VIH
VIL
IX
Power Supply Voltage
I/O Supply Voltage
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage[7]
Input Load Current
Input Current of MODE
VDD = Min., IOH = –4.0 mA[9]
VDD = Min., IOL = 8.0 mA[9]
GND ≤ VI ≤ VDDQ
IOZ
Output Leakage Current GND ≤ VI ≤ VDDQ, Output Disabled
ICC
VDD Operating Supply VDD = Max., IOUT = 0 mA,
5.0-ns cycle, 166 MHz
f = fMAX = 1/tCYC
6.6-ns cycle, 150 MHz
7.0-ns cycle, 143 MHz
7.5-ns cycle, 133 MHz
10-ns cycle, 100 MHz
12.5-ns cycle, 80 MHz
ISB1
Automatic CE
Max. VDD, Device Deselected, 5.0-ns cycle, 166 MHz
Power-Down
Current—TTL Inputs
VIN ≥ VIH or VIN ≤ VIL
f = fMAX = 1/tCYC
6.6-ns cycle, 150 MHz
7.0-ns cycle, 143 MHz
7.5-ns cycle, 133 MHz
10-ns cycle, 100 MHz
12.5-ns cycle, 80 MHz
ISB2
Automatic CE Power- Max. VDD, Device Deselected, VIN All speed grades
Down Current—CMOS ≤ 0.3V or VIN > VDDQ – 0.3V,
Inputs
f=0
ISB3
Automatic CE Power- Max. VDD, Device Deselected, or 5.0-ns cycle, 166 MHz
Down Current—CMOS
Inputs
VIN ≤ 0.3V or VIN > VDDQ – 0.3V
f = fMAX = 1/tCYC
6.6-ns cycle, 150 MHz
7.0-ns cycle, 143 MHz
7.5-ns cycle, 133 MHz
10-ns cycle, 100 MHz
12.5-ns cycle, 80 MHz
Shaded areas contain advance information.
Notes:
7. Minimum voltage equals –2.0V for pulse duration less than 20 ns.
8. TA is the case temperature.
9. The load used for VOH and VCL testing is shown in part (b) of A/C Test Loads and Waveforms.
Min.
3.135
3.135
2.4
2.0
−0.3
−5
−30
−5
Max.
3.465
3.465
0.4
VDD + 0.3V
0.8
5
30
5
400
375
350
300
250
200
90
80
70
60
50
40
5
80
70
60
50
40
30
Unit
V
V
V
V
V
V
µA
µA
µA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
6
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