CY7C1313AV18-200BZC Просмотр технического описания (PDF) - Cypress Semiconductor

Номер в каталоге

Компоненты Описание

производитель

CY7C1313AV18-200BZC

18-Mb QDR™-II SRAM 4-Word Burst Architecture

Cypress Semiconductor 

Logic Block Diagram (CY7C1313AV18)

D[17:0] 18

A(17:0)

18

K

K

DOFF

Address

Register

CLK

Gen.

VREF

WPS

BWS[1:0]

Control

Logic

Logic Block Diagram (CY7C1315AV18)

D[35:0] 36

A(16:0)

17

K

K

DOFF

VREF

WPS

BWS[3:0]

Address

Register

CLK

Gen.

Control

Logic

Selection Guide

Maximum Operating Frequency

Maximum Operating Current

PRELIMINARY

CY7C1311AV18

CY7C1313AV18

CY7C1315AV18

Write Write Write Write

Reg Reg Reg Reg

Address

Register

18 A(17:0)

Read Data Reg.

72 36

36

Control

Logic

Reg.

Reg.

RPS

C

C

CQ

CQ

Reg.

18

18 Q[17:0]

Write Write Write Write

Reg Reg Reg Reg

Address

Register

17 A(16:0)

Read Data Reg.

144 72

72

Control

Logic

Reg.

Reg.

RPS

C

C

CQ

CQ

Reg.

36

36 Q[35:0]

250 MHz

250

800

200 MHz

200

700

167 MHz

167

640

Unit

MHz

mA

Document #: 38-05498 Rev. *A

Page 2 of 22

Share Link: